Shunt termination path

• US 10,211,830 B2
• Filed: 04/28/2017
• Issued: 02/19/2019
• Est. Priority Date: 04/28/2017
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Brindle, Christopher Nelles, Wang, Jingbo, Tikka, Pasi Tapani
• Primary Examiner(s): Tran, Anh Q
• Application Number:
  US15/581,592
• Publication Number:
  US 20180316350A1
• Time in Patent Office: 662 Days
• Field of Search: None
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 19/0005 Modifications of input or output impedance

Abstract

Certain aspects of the present disclosure generally relate to electronic circuits and, more particularly, to a switch architecture including a shunt termination path, for example to provide isolation between two terminals. More particularly, aspects of the present disclosure relate to methods for operating a shunt path to achieve various termination states. An exemplary method generally includes providing a first control signal to a plurality of transistors coupled in series between an electrical path and a termination transistor, wherein the termination transistor is coupled in series between the plurality of transistors and ground, providing a second control signal to the termination transistor, and dynamically controlling the first and second control signals to achieve a desired termination state for the electrical path.

Claims

1. A method of operating an electrical circuit, comprising:

providing a first control signal to a gate of each of a plurality of transistors coupled in series between an electrical path and a termination transistor, wherein a corresponding resistance is coupled between a source and a drain of each of the plurality of transistors, another resistance is coupled between a source and a drain of the termination transistor, the termination transistor is coupled in series between the plurality of transistors and ground, and the plurality of transistors and corresponding resistances and the termination transistor and corresponding other resistance form a configurable shunt between the electrical path and ground;

providing a second control signal to a gate of the termination transistor; and

dynamically and independently controlling the first and second control signals to configure the shunt to a desired termination state for the electrical path.

2. The method of claim 1, wherein:

a gate terminal of each of the plurality of transistors is coupled with a first power source; and

a gate terminal of the termination transistor is coupled with a second power source.

3. The method of claim 2, wherein:

the first control signal is provided to the plurality of transistors by the first power source; and

the second control signal is provided to the termination transistor by the second power source.

4. The method of claim 2, wherein a first gate resistor is coupled in between the gate terminal of each of the plurality of transistors and the first power source and a second gate resistor is coupled in between the gate terminal of the termination transistor and the second power source.

5. The method of claim 2, wherein dynamically controlling the first and second control signals comprises using the first power source to turn off the plurality of transistors and using the second power source to turn on the termination transistor.

6. The method of claim 2, wherein dynamically controlling the first and second control signals comprises using the first power source to turn on the plurality of transistors and using the second power source to turn on the termination transistor to provide a short between the electrical path and ground.

7. The method of claim 2, wherein dynamically controlling the first and second control signals comprises using the first power source and the second power source independently to achieve the desired termination state for the electrical path.

8. The method of claim 1 wherein desired termination states comprise at least one of a termination state that improves a Q-factor of the shunt path, a termination state that achieves an absorptive effect, or a termination state that achieves a short between the electrical path and ground, or a termination state that achieves a high impedance connection between the electrical path and ground.

9. An apparatus, comprising:

an electrical path;

a plurality of transistors coupled to the electrical path;

a corresponding plurality of resistors, each of the plurality of resistors coupled between a drain and a source of a corresponding one of the plurality of transistors,

a termination transistor;

a termination resistor coupled between a drain and a source of the termination transistor,

wherein the plurality of transistors and corresponding resistors are coupled in series between the electrical path and the termination transistor with corresponding termination resistor, and the termination transistor with corresponding termination resistor is coupled in series between the plurality of transistors and ground to form a configurable shunt;

a source of a first control signal configured to be selectively applied to gates of the plurality of transistors; and

a source of a second control signal configured to be selectively applied to a gate of the termination transistor, the first and second control signals being dynamically and independently controllable to achieve a desired termination state for the electrical path.

10. The apparatus of claim 9, wherein:

the gate terminal of each of the plurality of transistors is coupled with a first power source; and

the gate terminal of the termination transistor is coupled with a second power source.

11. The apparatus of claim 10, wherein:

the first control signal is provided to the plurality of transistors by the first power source; and

the second control signal is provided to the termination transistor by the second power source.

12. The apparatus of claim 10, wherein a first gate resistor is coupled in between the gate terminal of each of the plurality of transistors and the first power source and a second gate resistor is coupled in between the gate terminal of the termination transistor and the second power source.

13. The apparatus of claim 10, further comprising a control module configured to dynamically control the first and second control signals by using the first power source to turn off the plurality of transistors and using the second power source to turn on the termination transistor.

14. The apparatus of claim 10, further comprising a control module configured to dynamically control the first and second control signals by using the first power source to turn on the plurality of transistors and using the second power source to turn on the termination transistor to provide a short between the electrical path and ground.

15. The apparatus of claim 10, further comprising a control module configured to dynamically control the first and second control signals by using the first power source and the second power source independently to achieve the desired termination state for the electrical path.

16. The apparatus of claim 9, wherein desired termination states comprise at least one of a termination state that improves a Q-factor of the shunt path, a termination state that achieves an absorptive effect, or a termination state that achieves a short between the electrical path and ground, or a termination state that achieves a high impedance connection between the electrical path and ground.

17. An apparatus for operating an electrical circuit, comprising:

means for providing a first control signal to a plurality of transistors coupled in series between an electrical path and a termination transistor, each of the plurality of transistors and the termination transistor being coupled across a corresponding resistance, wherein the termination transistor with corresponding resistance is coupled in series between the plurality of transistors with corresponding resistances and ground to form a configurable shunt;

means for providing a second control signal to the termination transistor; and

means for dynamically and independently controlling the first and second control signals to achieve a desired termination state for the electrical path.

18. The apparatus of claim 17, wherein:

a gate terminal of each of the plurality of transistors is coupled with a first means for providing power; and

a gate terminal of the termination transistor is coupled with a second means for providing power.

19. The apparatus of claim 18, wherein:

the first control signal is provided to the plurality of transistors by the first means for providing power; and

the second control signal is provided to the termination transistor by the second means for providing power.

20. The apparatus of claim 18, wherein the means for dynamically controlling the first and second control signals are configured to use the first means for providing power and the second means for providing power independently to achieve the desired termination state for the electrical path.

21. The apparatus of claim 17, wherein desired termination states comprise at least one of a termination state that improves a Q-factor of a shunt path of the electrical circuit, a termination state that achieves an absorptive effect, or a termination state that achieves a short between the electrical path and ground, or a termination state that achieves a high impedance connection between the electrical path and ground.

22. A switch, comprising:

a stack of transistors in shunt with a signal path;

a plurality of resistors, each resistor being coupled between a source and a drain of a respective transistor in the stack of transistors; and

a selectively bypassable terminating impedance coupled between the stack of transistors and ground, the terminating impedance being selectively bypassable independent of any control of the stack of transistors.

23. The switch of claim 22, wherein the terminating impedance comprises a first resistor configured to provide a terminating impedance when the transistors in the stack of transistors are on.

24. The switch of claim 23, further comprising a first transistor, wherein the first resistor is coupled between a source and drain of the first transistor.

25. The switch of claim 24, wherein gates of the transistors in the stack of transistors are coupled to a first control, and wherein a gate of the first transistor is coupled to a second control.

26. The switch of claim 24, wherein the first transistor has a higher impedance than the first resistor when the first transistor is off and the transistors in the stack of transistors are on.