Switching circuit for RF currents
First Claim
Patent Images
1. A switching circuit comprising:
- a first switch coupled to a first switch terminal, the first switch comprising at least one gallium nitride high-electron mobility transistor (GaN HEMT);
a second switch coupled in series with the first switch and a second switch terminal, the second switching comprising a GaN HEMT; and
at least one power source configured to provide power to the first switch and the second switch;
wherein the second switch is configured to drive the first switch ON and OFF.
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Abstract
In one embodiment, a switching circuit includes a first switch coupled to a first switch terminal, the first switch comprising at least one gallium nitride high-electron mobility transistor (GaN HEMT); a second switch coupled in series with the first switch and a second switch terminal, the second switching comprising a GaN HEMT; and at least one power source configured to provide power to the first switch and the second switch; wherein the second switch is configured to drive the first switch ON and OFF.
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Citations
19 Claims
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1. A switching circuit comprising:
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a first switch coupled to a first switch terminal, the first switch comprising at least one gallium nitride high-electron mobility transistor (GaN HEMT); a second switch coupled in series with the first switch and a second switch terminal, the second switching comprising a GaN HEMT; and at least one power source configured to provide power to the first switch and the second switch; wherein the second switch is configured to drive the first switch ON and OFF. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of controlling a switching circuit, the method comprising:
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coupling a first switch to a first switch terminal, the first switch comprising at least one gallium nitride high-electron mobility transistor (GaN HEMT); coupling a second switch in series with the first switch and a second switch terminal, the second switching comprising a GaN HEMT, wherein the second switch configured to drive the first switch ON and OFF; coupling at least one power source to the first switch and the second switch; driving the first switch ON to thereby drive the first and second switches simultaneously ON, and thereby pass an RF current between the first switch terminal and the second switch terminal; and driving the first switch OFF to thereby drive the first and second switches simultaneously OFF, and thereby not pass the RF current between the first switch terminal and the second switch terminal. - View Dependent Claims (10, 11, 12)
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13. A method of fabricating a semiconductor, the method comprising:
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placing a substrate in a plasma chamber configured to deposit a material layer onto the substrate or etch a material layer from the substrate; energizing plasma within the plasma chamber by coupling RF power from an RF source into the plasma chamber to perform a deposition or etching; and while energizing the plasma, carrying out an impedance match by an impedance matching network coupled between a load and an RF source, wherein the impedance matching network comprises; a first variable component providing a first variable capacitance or inductance; and a second variable component providing a second variable capacitance or inductance; and wherein each of the first variable component and the second variable component has a plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance, respectively, each of the plurality of switching circuits comprising; a first switch coupled to a first switch terminal, the first switch comprising at least one gallium nitride high-electron mobility transistor (GaN HEMT); a second switch coupled in series with the first switch and a second switch terminal, the second switching comprising a GaN HEMT; and at least one power source configured to provide power to the first switch and the second switch; wherein the second switch is configured to drive the first switch ON and OFF. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A semiconductor processing tool comprising:
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a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate; and an impedance matching circuit operably coupled to the plasma chamber, the matching circuit comprising; a first variable component providing a first variable capacitance or inductance; and a second variable component providing a second variable capacitance or inductance; wherein each of the first variable component and the second variable component has a plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance, respectively, each of the plurality of switching circuits comprising; a first switch coupled to a first switch terminal, the first switch comprising at least one gallium nitride high-electron mobility transistor (GaN HEMT); a second switch coupled in series with the first switch and a second switch terminal, the second switching comprising a GaN HEMT; and at least one power source configured to provide power to the first switch and the second switch; wherein the second switch is configured to drive the first switch ON and OFF.
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Specification