Display substrate, manufacturing method thereof, and display device

• US 10,217,775 B2
• Filed: 06/19/2015
• Issued: 02/26/2019
• Est. Priority Date: 12/23/2014
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Inventors: Wang, Shijun, Jiang, Wenbo, Lv, Zhenhua, Bao, Zhiying
• Primary Examiner(s): Gebreyesus, Yosef
• Application Number:
  US14/787,627
• Publication Number:
  US 20160358948A1
• Time in Patent Office: 1,348 Days
• CPC Class Codes: G09G 5/003 Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto specific for a CRT G09G1/165; for a flat panel G09G3/2092
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 29/78633 with a light shield

Abstract

A display substrate, a manufacturing method thereof, and a display device are disclosed. The display substrate includes a display region and a peripheral region, a display device including the display substrate further includes a gate driving circuit, the gate driving circuit includes a capacitor (C), the capacitor (C) includes a first electrode and a second electrode with an electrical insulation layer provided therebetween. The first electrode and the second electrode are remaining portions of films for forming conductive layers in the display region left in the peripheral region, and the electrical insulation layer is a remaining portion of a film for forming an insulation layer in the display region left in the peripheral region.

Claims

1. A display substrate comprising a display region and a peripheral region, wherein:

the peripheral region is provided with a capacitor therein, the capacitor comprises a first electrode and a second electrode with an electrical insulation layer provided therebetween,

the display region is provided with an insulation layer and conductive layers therein, the first electrode and the second electrode are remaining portions of films for forming the conductive layers left in the peripheral region, and the electrical insulation layer is a remaining portion of a film for forming the insulation layer left in the peripheral region,

the first electrode comprises a first transparent conductive layer and a first light shielding conductive layer, and the second electrode comprises a second transparent conductive layer and a second light shielding conductive layer.

2. The display substrate according to claim 1, wherein the display substrate is an array substrate or a color filter substrate.

3. The display substrate according to claim 2, wherein the capacitor is provided on the array substrate.

4. The display substrate according to claim 2, wherein:

in the display region, a first metal layer, a gate insulation layer, a second metal layer, a buffer layer, a resin layer, a first electrode layer, a passivation layer and a second electrode layer are sequentially provided, or in the display region, the first metal layer, the gate insulation layer, the second metal layer, the buffer layer, the first electrode layer, the passivation layer and the second electrode layer are sequentially provided;

a remaining portion of a film for forming the first metal layer left in the peripheral region is a first metal layer remaining portion;

a remaining portion of a film for forming the gate insulation layer left in the peripheral region is a gate insulation layer remaining portion;

a remaining portion of a film for forming the second metal layer left in the peripheral region is a second metal layer remaining portion;

a remaining portion of a film for forming the buffer layer left in the peripheral region is a buffer layer remaining portion;

a remaining portion of a film for forming the resin layer left in the peripheral region is a resin layer remaining portion;

a remaining portion of a film for forming the first electrode layer left in the peripheral region is a first electrode layer remaining portion;

a remaining portion of a film for forming the passivation layer left in the peripheral region is a passivation layer remaining portion; and

a remaining portion of a film for forming the second electrode layer left in the peripheral region is a second electrode layer remaining portion;

wherein one of the first metal layer and the second metal layer is a gate metal layer, and the other one is a source/drain metal layer, and one of the first electrode layer and the second electrode layer is a pixel electrode layer, and the other one is a common electrode layer.

5. The display substrate according to claim 4, wherein:

the first transparent conductive layer is the first electrode layer remaining portion;

the second transparent conductive layer is the second electrode layer remaining portion;

the first light shielding conductive layer is the first metal layer remaining portion; and

the second light shielding conductive layer is the second metal layer remaining portion.

6. The display substrate according to claim 5, wherein:

the first transparent conductive layer is connected with the first light shielding conductive layer through a via hole;

or

the second transparent conductive layer is connected with the second light shielding conductive layer through a via hole.

7. The display substrate according to claim 4, wherein the first metal layer remaining portion, the gate insulation layer remaining portion, the second metal layer remaining portion, the buffer layer remaining portion and the first electrode layer remaining portion are sequentially provided in a region where the capacitor is located, and the region where the capacitor is located is further provided with a first via hole which penetrates through both the buffer layer remaining portion and the gate insulation layer remaining portion, and the first electrode layer remaining portion is electrically connected with the first metal layer remaining portion through the first via hole;

there is an overlapped region between the second metal layer remaining portion and the first metal layer remaining portion, and there is an overlapped region between the second metal layer remaining portion and the first electrode layer remaining portion;

the first electrode comprises the first metal layer remaining portion and the first electrode layer remaining portion, and the second electrode comprises the second metal layer remaining portion.

8. The display substrate according to claim 4, wherein:

the first metal layer, the gate insulation layer, the second metal layer, the passivation layer and the pixel electrode layer are sequentially provided in the display region;

a remaining portion of a film for forming the first metal layer left in the peripheral region comprises a first metal layer remaining portion;

a remaining portion of a film for forming the gate insulation layer left in the peripheral region comprises a gate insulation layer remaining portion;

a remaining portion in the peripheral region a film for forming the second metal layer comprises a second metal layer remaining portion;

a remaining portion of a film for forming the passivation layer left in the peripheral region comprises a passivation layer remaining portion; and

a remaining portion of a film for forming the pixel electrode layer left in the peripheral region comprises a pixel electrode layer remaining portion;

wherein the first metal layer is the gate metal layer, and the second metal layer is the source/drain metal layer;

or the first metal layer is the source/drain metal layer and the second metal layer is the gate metal layer.

9. The display substrate according to claim 8, wherein:

the first transparent conductive layer and the second transparent conductive layer comprise the pixel electrode layer remaining portion; and

the first light shielding conductive layer and the second light shielding conductive layer comprise the first metal layer remaining portion or the second metal layer remaining portion.

10. The display substrate according to claim 4, wherein the first metal layer remaining portion, the gate insulation layer remaining portion, the second metal layer remaining portion, the passivation layer remaining portion and the pixel electrode layer remaining portion are sequentially provided in a region where the capacitor is located, a second via hole penetrating through the passivation layer remaining portion and the gate insulation layer remaining portion is further provided in the region where the capacitor is located, the pixel electrode layer remaining portion is electrically connected with the first metal layer remaining portion through the second via hole;

there is an overlapped region between the second metal layer remaining portion and the first metal layer remaining portion, and there is an overlapped region between the second metal layer remaining portion and the pixel electrode layer remaining portion;

the first electrode comprises the second metal layer remaining portion, and the second electrode comprises the first metal layer remaining portion and the pixel electrode layer remaining portion.

11. The display substrate according to claim 4, wherein the first metal layer remaining portion, the gate insulation layer remaining portion, the second metal layer remaining portion, the resin layer remaining portion, the first electrode layer remaining portion, the passivation layer remaining portion and the second electrode layer remaining portion are sequentially provided in a region where the capacitor is located, a third via hole penetrating through the resin layer remaining portion and the gate insulation layer remaining portion and the region where the capacitor is located is further provided with a fourth via hole which penetrates through both the passivation layer remaining portion and the resin layer remaining portion, the first electrode layer remaining portion is electrically connected with the first metal layer remaining portion through the third via hole, and the second electrode layer remaining portion is electrically connected with the second metal layer remaining portion through the fourth via hole;

the first electrode comprises the first metal layer remaining portion and the first electrode layer remaining portion, and the second electrode comprises the second metal layer remaining portion and the second electrode layer remaining portion.

12. The display substrate according to claim 11, wherein there is no overlapped region between the first metal layer remaining portion and the second metal layer remaining portion.

13. The display substrate according to claim 11, wherein there is an overlapped region between the first metal layer remaining portion and the second metal layer remaining portion.

14. The display substrate according to claim 11, wherein the buffer layer remaining portion is provided between the second metal layer remaining portion and the resin layer remaining portion.

15. The display substrate according to claim 4, wherein the first metal layer remaining portion, the gate insulation layer remaining portion, the second metal layer remaining portion, the buffer layer remaining portion, the first electrode remaining portion, the passivation layer remaining portion and the second electrode layer remaining portion are sequentially provided in a region where the capacitor is located, a fifth via hole penetrating through the buffer layer remaining portion and the gate insulation layer remaining portion and a sixth via hole penetrating through the passivation layer remaining portion and the buffer layer remaining portion is further provided in the region where the capacitor is located, the first electrode layer remaining portion is electrically connected with the first metal layer remaining portion through the fifth via hole, and the second electrode layer remaining portion is electrically connected with the second metal layer remaining portion through the sixth via hole;

there is an overlapped region between the first metal layer remaining portion, the second metal layer remaining portion, the first electrode layer remaining portion and the second electrode layer remaining portion;

the first electrode comprises the first metal layer remaining portion and the first electrode layer remaining portion, and the second electrode comprises the second metal layer remaining portion and the second electrode layer remaining portion.

16. A display substrate including a display region, a peripheral region, and a capacitor in the peripheral region, wherein:

the capacitor includes a first electrode and a second electrode with an electrical insulation layer provided therebetween,

the display region is provided with an insulation layer and conductive layers therein, the first electrode and the second electrode are remaining portions of films formed when making the conductive layers left in the peripheral region, and the electrical insulation layer is a remaining portion of a film formed when making the insulation layer left in the peripheral region,

the first electrode comprises a first transparent conductive layer and a first light shielding conductive layer, and the second electrode comprises a second transparent conductive layer and a second light shielding conductive layer.