Apparatus and method for driving a power stage

• US 10,218,258 B1
• Filed: 01/09/2018
• Issued: 02/26/2019
• Est. Priority Date: 01/09/2018
• Status: Active Grant

• Current Assignee: Dialog Semiconductors (UK) Limited
• Original Assignee: Dialog Semiconductors (UK) Limited
• Inventors: Nagl, Christoph N., Knoedgen, Horst, Jelaca, Nebojsa
• Primary Examiner(s): Finch, III, Fred E
• Application Number:
  US15/865,802
• Time in Patent Office: 413 Days
• CPC Class Codes: H02M 1/0058 by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero using an auxiliary actively switched resonant commutation circuit connected to an intermediate DC voltage or between two push-pull branches of an inverter bridge H02M7/4811; in resonant inverters H02M7/4815; in inverters operating from a resonant DC source H02M7/4826
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 1/083 for the ignition at the zero crossing of the voltage or the current
• CPC Class Codes: H02M 1/088 for the simultaneous control of series or parallel connected semiconductor devices
• CPC Class Codes: H02M 1/38 Means for preventing simultaneous conduction of switches
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A method and apparatus for driving a power stage is presented. In particular, the power stage is a half-bridge. In the method, there is a first power switch coupled to a second power switch via a switching node. The method steps include sensing a first control-terminal voltage of one of the first power switch and the second power switch and turning on the first power switch based on the first control-terminal voltage and sensing a second control-terminal voltage of one of the first power switch and the second power switch and turning on the second power switch based on the second control-terminal voltage. Optionally, the first power switch is turned on when the first control-terminal voltage has reached a first threshold value, and the second power switch is turned on when the second control-terminal voltage has reached a second threshold value.

Claims

1. A method of driving a power stage comprising a first power switch coupled to a second power switch via a switching node;

the method comprising;

providing a first sensing resistance coupled to a control terminal of the first power switch and a second sensing resistance coupled to a control terminal of the second power switch;

sensing a first control-terminal voltage of one of the first power switch and the second power switch, comparing the first control-terminal voltage with a first reference value and generating a first control signal based on the comparison to turn on the first power switch;

sensing a second control-terminal voltage of one of the first power switch and the second power switch, comparing the second control-terminal voltage with a second reference value and generating a second control signal based on the comparison to turn on the second power switch.

2. The method as claimed in claim 1, wherein the first power switch is turned on when the first control-terminal voltage has reached a first threshold value;

and wherein the second power switch is turned on when the second control-terminal voltage has reached a second threshold value.

3. The method as claimed in claim 1,

wherein the first power switch comprises a first parasitic capacitor associated with a first parasitic current, and

wherein the second power switch comprises a second parasitic capacitor associated with a second parasitic current.

4. The method as claimed in claim 3, wherein the first control-terminal voltage is a function of the first parasitic current and the first sensing resistance;

and wherein the second control-terminal voltage is a function of the second parasitic current and the second sensing resistance.

5. The method as claimed in claim 3, wherein the switching node has a switching voltage;

and wherein the first and second parasitic currents are function of a time derivative of the switching voltage.

6. The method as claimed in claim 1, wherein the switching node has a switching voltage that varies between a first value and a second value during a transient period;

and wherein the first control-terminal voltage and the second control-terminal voltage are sensed at some point during the transient period.

7. A driver for use with a power stage, the power stage comprising a first power switch coupled to a second power switch via a switching node;

the driver comprising a first sensing resistance coupled to a control terminal of the first power switch and a second sensing resistance coupled to a control terminal of the second power switch;

the driver being adapted

to sense a first control-terminal voltage of one of the first power switch and the second power switch, to compare the first control-terminal voltage with a first reference and to generate a first control signal based on the comparison to turn on the first power switch;

to sense a second control-terminal voltage of one of the first power switch and the second power switch;

to compare the second control-terminal voltage with a second reference and to generate a second control signal based on the comparison to turn on the second power switch.

8. The driver as claimed in claim 7, wherein driver is adapted to turn on the first power switch when the first control-terminal voltage has reached a first threshold value;

and to turn on the second power switch when the second control-terminal voltage has reached a second threshold value.

9. The driver as claimed in claim 7,

wherein the first power switch comprises a first parasitic capacitor associated with a first parasitic current, and

wherein the second power switch comprises a second parasitic capacitor associated with a second parasitic current.

10. The driver as claimed in claim 9, wherein the first control-terminal voltage is a function of the first parasitic current and the first sensing resistance;

and wherein the second control-terminal voltage is a function of the second parasitic current and the second sensing resistance.

11. The driver as claimed in claim 9, wherein the switching node has a switching voltage;

and wherein the first and second parasitic currents are function of a time derivative of the switching voltage.

12. The driver as claimed in claim 7, further comprising:

a first comparator to compare the first control-terminal voltage with the first reference and to provide a first comparison signal;

a second comparator to compare the second control-terminal voltage with the second reference and to provide a second comparison signal;

a controller coupled to the first comparator and the second comparator;

the controller being adapted to provide the first control signal to turn the first power switch on and the second control signal to turn the second power switch on;

wherein the first control signal is based on the first comparison signal; and

wherein the second control signal is based on the second comparison signal.

13. The driver as claimed in claim 12, wherein the switching node has a switching voltage, the switching voltage increasing from a first value to a second value during a first transient period, and decreasing from the second value to the first value during a second transient period;

and

wherein the first comparator is adapted to compare the first control-terminal voltage with the first reference at some point during the first transient period; and

wherein the second comparator is adapted to compare the second control-terminal voltage with the second reference at some point during the second transient period.

14. The driver as claimed in claim 12, wherein the first comparator comprises a first transistor coupled to the first reference;

and wherein the second comparator comprises a second transistor coupled to the second reference.

15. The driver as claimed in claim 12, wherein the first comparator is coupled to the first sensing resistor;

and wherein the second comparator is coupled to the second sensing resistor.

16. The driver as claimed in claim 15, wherein the first sensing resistor is provided between the switching node and a control-terminal terminal of the first power switch;

and wherein the second sensing resistor is provided between a ground terminal and a control-terminal terminal of the second power switch.

17. A power circuit comprising:

a power stage comprising a first power switch coupled to a second power switch via a switching node; and

a driver, the driver comprising a first sensing resistance coupled to a control terminal of the first power switch and a second sensing resistance coupled to a control terminal of the second power switch;

the driver being adapted

to sense a first control-terminal voltage of one of the first power switch and the second power switch, to compare the first control-terminal voltage with a first reference and to generate a first control signal based on the comparison to turn on the first power switch;

to sense a second control-terminal voltage of one of the first power switch and the second power switch, to compare the second control-terminal voltage with a second reference and to generate a second control signal based on the comparison to turn on the second power switch.

18. The power circuit as claimed in claim 17, wherein the power circuit is made at least in part of a III/V semiconductor.

19. The power circuit as claimed in claim 17,

wherein the first power switch comprises a first parasitic capacitor associated with a first parasitic current, and

wherein the second power switch comprises a second parasitic capacitor associated with a second parasitic current.

20. The power circuit as claimed in claim 19, wherein the first control-terminal voltage is a function of the first parasitic current and the first sensing resistance;

and wherein the second control-terminal voltage is a function of the second parasitic current and the second sensing resistance.

21. The power circuit as claimed in claim 19, wherein the switching node has a switching voltage;

and wherein the first and second parasitic currents are function of a time derivative of the switching voltage.

22. The power circuit as claimed in claim 17, wherein the driver comprises:

a first comparator to compare the first control-terminal voltage with the first reference and to provide a first comparison signal;

a second comparator to compare the second control-terminal voltage with the second reference and to provide a second comparison signal;

a controller coupled to the first comparator and the second comparator;

the controller being adapted to provide the first control signal to turn the first power switch on and the second control signal to turn the second power switch on;

wherein the first control signal is based on the first comparison signal; and

wherein the second control signal is based on the second comparison signal.

23. The power circuit as claimed in claim 22, wherein the switching node has a switching voltage, the switching voltage increasing from a first value to a second value during a first transient period, and decreasing from the second value to the first value during a second transient period;

and

wherein the first comparator is adapted to compare the first control-terminal voltage with the first reference at some point during the first transient period; and

wherein the second comparator is adapted to compare the second control-terminal voltage with the second reference at some point during the second transient period.