Multi-stage voltage multiplication circuit for inverting a direct current power signal
First Claim
1. A system, comprising:
- a boost circuit configured to;
receive a direct current (DC) signal at a first DC voltage, a duty clock signal, and a reference DC signal at a second DC voltage, wherein the duty clock signal controls a duty cycle of components within the boost circuit;
generate a first intermediate DC signal at a third DC voltage based on the duty clock signal and a comparison of the reference DC signal and a second intermediate DC signal received at a fourth DC voltage, wherein the boost circuit is further configured to adjust the third DC voltage of the first intermediate DC signal to cause the fourth DC voltage of the second intermediate DC signal to approach the second DC voltage of the reference DC signal based on the comparison of the reference DC signal and the second intermediate DC signal;
a voltage converter circuit electrically coupled to the boost circuit and configured to;
receive the first intermediate DC signal at the third DC voltage;
receive a clock signal; and
generate the second intermediate DC signal at the fourth DC voltage, wherein the fourth DC voltage of the second intermediate DC signal is greater than the third DC voltage of the first intermediate DC signal;
a voltage driver circuit electrically coupled to the voltage converter circuit and configured to;
receive the second intermediate DC signal at the fourth DC voltage; and
generate an alternating current (AC) signal at an AC voltage based on the second intermediate DC signal at the fourth DC voltage;
a low voltage circuit electrically coupled to the boost circuit, the voltage converter circuit, and the voltage driver circuit and configured to;
determine a current of the first intermediate DC signal;
determine the fourth DC voltage of the second intermediate DC signal;
generate the duty clock signal based on the second intermediate DC signal at the fourth DC voltage, wherein the duty clock signal adjusts a duty cycle of the boost circuit;
generate the clock signal based on the current of the first intermediate DC signal and the fourth DC voltage of the second intermediate DC signal, wherein the clock signal adjusts a clock rate within the voltage converter circuit; and
transmit the clock signal to the voltage converter circuit.
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Accused Products
Abstract
A boost circuit receives a DC signal at a first voltage, a duty clock, a reference at a second voltage, and a second intermediate signal at a fourth voltage; compares the reference and the second intermediate signal; generates a first intermediate signal at a third voltage based on the duty clock and the comparison of the reference and the second intermediate signal; and adjusts the third voltage to cause the fourth voltage to approach the second voltage based on the comparison of the reference and the second intermediate signal. The voltage converter receives the first intermediate signal at the second voltage and a clock and generates the second intermediate signal at the fourth voltage, which may be greater than the third voltage. The voltage driver receives the second intermediate signal at the fourth voltage and generates an AC signal at an AC voltage based on the second intermediate signal.
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Citations
13 Claims
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1. A system, comprising:
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a boost circuit configured to; receive a direct current (DC) signal at a first DC voltage, a duty clock signal, and a reference DC signal at a second DC voltage, wherein the duty clock signal controls a duty cycle of components within the boost circuit; generate a first intermediate DC signal at a third DC voltage based on the duty clock signal and a comparison of the reference DC signal and a second intermediate DC signal received at a fourth DC voltage, wherein the boost circuit is further configured to adjust the third DC voltage of the first intermediate DC signal to cause the fourth DC voltage of the second intermediate DC signal to approach the second DC voltage of the reference DC signal based on the comparison of the reference DC signal and the second intermediate DC signal; a voltage converter circuit electrically coupled to the boost circuit and configured to; receive the first intermediate DC signal at the third DC voltage; receive a clock signal; and generate the second intermediate DC signal at the fourth DC voltage, wherein the fourth DC voltage of the second intermediate DC signal is greater than the third DC voltage of the first intermediate DC signal; a voltage driver circuit electrically coupled to the voltage converter circuit and configured to; receive the second intermediate DC signal at the fourth DC voltage; and generate an alternating current (AC) signal at an AC voltage based on the second intermediate DC signal at the fourth DC voltage; a low voltage circuit electrically coupled to the boost circuit, the voltage converter circuit, and the voltage driver circuit and configured to; determine a current of the first intermediate DC signal; determine the fourth DC voltage of the second intermediate DC signal; generate the duty clock signal based on the second intermediate DC signal at the fourth DC voltage, wherein the duty clock signal adjusts a duty cycle of the boost circuit; generate the clock signal based on the current of the first intermediate DC signal and the fourth DC voltage of the second intermediate DC signal, wherein the clock signal adjusts a clock rate within the voltage converter circuit; and transmit the clock signal to the voltage converter circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A system, comprising:
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a boost circuit comprising; a comparator circuit configured to; receive a reference DC signal at a second DC voltage; generate a comparison signal based on a comparison of the reference DC signal and a second intermediate DC signal received at a fourth DC voltage; a servo loop control circuit electrically coupled to the comparator circuit and configured to; receive the comparison signal; and generate a gate driver signal based on the comparison signal; and a switching inductive circuit electrically coupled to the servo loop control circuit and a voltage converter circuit and configured to; receive a DC signal at a first DC voltage and a duty clock signal, wherein the duty clock signal controls a duty cycle of components within the boost circuit; and generate a first intermediate DC signal at a third DC voltage based on the duty clock signal and the gate driver signal; the voltage converter circuit electrically coupled to the switching inductive circuit and the comparator circuit and configured to; receive the first intermediate DC signal at the third DC voltage; receive a clock signal; and generate the second intermediate DC signal at the fourth DC voltage, wherein the fourth DC voltage of the second intermediate DC signal is greater than the third DC voltage of the first intermediate DC signal, and wherein the switching inductive circuit is configured to adjust the third DC voltage of the first intermediate DC signal to cause the fourth DC voltage of the second intermediate DC signal to approach the second DC voltage of the reference DC signal based on the gate driver signal and the duty clock signal; a voltage driver circuit electrically coupled to the voltage converter circuit and configured to; receive the second intermediate DC signal at the fourth DC voltage; and generate an AC signal at an AC voltage based on the second intermediate DC signal at the fourth DC voltage; and an LC filter circuit electrically coupled to the voltage driver circuit and configured to; receive the AC signal at the AC voltage; and generate a filtered AC signal based on the AC signal at the AC voltage; a low voltage circuit electrically coupled to the boost circuit, the voltage converter circuit, and the voltage driver circuit and configured to; determine a current of the first intermediate DC signal; determine the fourth DC voltage of the second intermediate DC signal; generate the duty clock signal based on the second intermediate DC signal at the fourth DC voltage, wherein the duty clock signal adjusts a duty cycle of the boost circuit; generate the clock signal based on the current of the first intermediate DC signal and the fourth DC voltage of the second intermediate DC signal, wherein the clock signal adjusts a clock rate within the voltage converter circuit; and transmit the clock signal to the voltage converter circuit. - View Dependent Claims (13)
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Specification