ECC memory controller supporting secure and non-secure regions
First Claim
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1. A system supporting memory with secure and non-secure regions, comprising:
- an ECC memory controller adapted to communicate with a data memory and an ECC memory;
a secure mode signal in communication with the ECC memory controller;
wherein the ECC memory controller generates a first syndrome to be written to the ECC memory for a first data word if the secure mode signal is a first value and generates a second syndrome, different than the first syndrome, to be written to the ECC memory for the first data word if the secure mode signal is a second value.
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Abstract
A system and method of utilizing ECC memory to detect software errors and malicious activities is disclosed. In one embodiment, after a pool of memory is freed, every data word in that pool is modified to ensure that an ECC error will occur if any data word in that pool is read again. In another embodiment, the ECC memory controller is used to detect and prevent non-secure applications from accessing secure portions of memory.
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Citations
31 Claims
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1. A system supporting memory with secure and non-secure regions, comprising:
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an ECC memory controller adapted to communicate with a data memory and an ECC memory; a secure mode signal in communication with the ECC memory controller; wherein the ECC memory controller generates a first syndrome to be written to the ECC memory for a first data word if the secure mode signal is a first value and generates a second syndrome, different than the first syndrome, to be written to the ECC memory for the first data word if the secure mode signal is a second value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method of partitioning a memory, having a data memory and an ECC memory, into secure and non-secure regions, comprising:
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calculating a first ECC syndrome to be written with a data word if a secure mode signal is asserted first value; and calculating a second ECC syndrome, different from the first ECC syndrome to be written with the data word if the secure mode signal is asserted second value; and writing the first ECC syndrome or the second ECC syndrome to the ECC memory, based on a value of the secure mode signal, when the data word is written to the data memory. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
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28. A system supporting memory with secure and non-secure regions, comprising:
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an ECC memory controller adapted to communicate with a data memory and an ECC memory; and a secure mode signal in communication with the ECC memory controller; wherein the ECC memory controller; reads a data word from the data memory and an ECC syndrome from the ECC memory; performs a first comparison if the secure mode signal is a first value and indicates an ECC error if the first comparison fails; and performs a second comparison if the secure mode signal is a second value and indicates an ECC error if the second comparison fails. - View Dependent Claims (29, 30, 31)
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Specification