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ECC memory controller supporting secure and non-secure regions

  • US 10,218,387 B2
  • Filed: 05/08/2017
  • Issued: 02/26/2019
  • Est. Priority Date: 05/08/2017
  • Status: Active Grant
First Claim
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1. A system supporting memory with secure and non-secure regions, comprising:

  • an ECC memory controller adapted to communicate with a data memory and an ECC memory;

    a secure mode signal in communication with the ECC memory controller;

    wherein the ECC memory controller generates a first syndrome to be written to the ECC memory for a first data word if the secure mode signal is a first value and generates a second syndrome, different than the first syndrome, to be written to the ECC memory for the first data word if the secure mode signal is a second value.

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