Usage of early bits in wireless communications
First Claim
Patent Images
1. A device, comprising:
- at least one memory that stores computer-executable instructions; and
at least one processor of one or more processors configured to access the at least one memory, wherein the at least one processor of the one or more processors is configured to execute the computer-executable instructions to;
identify a high efficiency frame in accordance with a high efficiency communication standard, received from a first device, the high efficiency frame including at least in part a legacy signal field and a high efficiency signal field;
determine a length field included in the legacy signal field;
determine one or more bits included in the length field;
determine that the high efficiency signal field has been repeated based at least in part on the one or more bits;
combine the high efficiency signal field and the repeated high efficiency signal field into a combined high efficiency signal field; and
decode the combined high efficiency signal field based at least in part on the one or more bits.
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Abstract
This disclosure describes methods, apparatus, and systems related to early bit indication system. A device may identify a high efficiency frame in accordance with a high efficiency communication standard, received from a first device, the high efficiency frame including at least in part a legacy signal field and a high efficiency signal field. The device may determine a length field included in the legacy signal field. The device may determine one or more bits included in the length field. The device may determine a repeated high efficiency signal field based at least in part on the one or more bits.
17 Citations
15 Claims
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1. A device, comprising:
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at least one memory that stores computer-executable instructions; and at least one processor of one or more processors configured to access the at least one memory, wherein the at least one processor of the one or more processors is configured to execute the computer-executable instructions to; identify a high efficiency frame in accordance with a high efficiency communication standard, received from a first device, the high efficiency frame including at least in part a legacy signal field and a high efficiency signal field; determine a length field included in the legacy signal field; determine one or more bits included in the length field; determine that the high efficiency signal field has been repeated based at least in part on the one or more bits; combine the high efficiency signal field and the repeated high efficiency signal field into a combined high efficiency signal field; and decode the combined high efficiency signal field based at least in part on the one or more bits. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A non-transitory computer-readable medium storing computer-executable instructions which, when executed by a processor, cause the processor to perform operations comprising:
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identifying a high efficiency frame in accordance with a high efficiency communication standard, received from a first device, the high efficiency frame including at least in part a legacy signal field and a high efficiency signal field; determining a length field included in the legacy signal field; determining one or more bits included in the length field; determining that the high efficiency signal field has been repeated based at least in part on the one or more bits; combining the high efficiency signal field and the repeated high efficiency signal field into a combined high efficiency signal field; and decoding the combined high efficiency signal field based at least in part on the one or more bits. - View Dependent Claims (11, 12, 13, 14, 15)
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Specification