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Method and system for accessing a flash memory device

  • US 10,223,003 B2
  • Filed: 11/09/2017
  • Issued: 03/05/2019
  • Est. Priority Date: 09/30/2005
  • Status: Active Grant
First Claim
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1. A flash memory device comprising:

  • a plurality of flash memory blocks;

    a clock input configured to receive a clock signal;

    a chip select input configured to receive a chip select signal;

    a plurality of serial data interfaces, each serial data interface configured to transfer a plurality of data streams in synchronization with the clock signal only when the chip select signal is in an active state; and

    control circuitry configured to;

    perform a program operation in response to a first data stream, the first data stream comprising a program command, a first address and write data, the write data configured to be programmed to a first flash memory block of the plurality of flash memory blocks and addressed by the first address,perform a read operation in response to a second data stream, the second data stream comprising a read command and a second address, the read operation configured to retrieve read data from a second flash memory block of the plurality of flash memory blocks and addressed by the second address, andtransfer the read data as a third data stream before completing the program operation on the first flash memory block; and

    a status indicator configured to indicate whether the program operation is in progress.

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