Bulk MLCC capacitor module

• US 10,224,149 B2
• Filed: 09/13/2016
• Issued: 03/05/2019
• Est. Priority Date: 12/09/2015
• Status: Active Grant

• Current Assignee: Kemet Electronics Corporation (Yageo Corporation)
• Original Assignee: Kemet Electronics Corporation (Yageo Corporation)
• Inventors: Miller, Galen W., McConnell, John E., Bultitude, John, Renner, Garry L.
• Primary Examiner(s): Ferguson, Dion
• Application Number:
  US15/264,305
• Publication Number:
  US 20170169956A1
• Time in Patent Office: 903 Days
• Field of Search: None
• CPC Class Codes: H01G 2/06 specially adapted for mounting on a printed-circuit support
• CPC Class Codes: H01G 4/12 Ceramic dielectrics H01G4/085 takes precedence
• CPC Class Codes: H01G 4/224 Housing; Encapsulation
• CPC Class Codes: H01G 4/232 electrically connecting two or more layers of a stacked or rolled capacitor
• CPC Class Codes: H01G 4/2325 characterised by the material of the terminals
• CPC Class Codes: H01G 4/30 Stacked capacitors H01G4/33 takes precedence
• CPC Class Codes: H01G 4/38 Multiple capacitors, i.e. structural combinations of fixed capacitors
• CPC Class Codes: H01G 4/40 Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 23/52 Arrangements for conducting electric current within the device in operation from one component to another , i.e. interconnections, e.g. wires, lead frames optical interconnections G02B6/00
• CPC Class Codes: H01L 23/538 the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates H05K takes precedence; manufacture or treatment H01L21/4846 ; mountings per se H01L23/12; materials H01L23/49866
• CPC Class Codes: H05K 1/182 associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Provided is a module comprising a carrier material, comprising a first conductive portion and a second conductive portion, and a multiplicity of electronic components wherein each electronic component comprises a first external termination with at least one first longitudinal edge and a second external termination with at least one second longitudinal edge. A first longitudinal edge of a first electronic component is connected to the first conductive portion by a first interconnect; and a second longitudinal edge of the first electronic component is connected to the second conductive portion by a second interconnect.

Claims

1. A module comprising:

a carrier material comprising a first conductive portion and a second conductive portion;

a multiplicity of electronic components wherein each electronic component of said electronic components comprises a first external termination with at least one first longitudinal edge and a second external termination with at least one second longitudinal edge;

a first electronic component of said multiplicity of electronic components wherein said first longitudinal edge of said first electronic component is connected to said first conductive portion by a first interconnect;

a second electronic component of said multiplicity of electronic components wherein said first longitudinal edge of said second electronic component is connected to said first conductive portion by said first interconnect;

and

said second longitudinal edge of said first electronic component is connected to said second conductive portion by a second interconnect wherein said first longitudinal edge is on a first side face of four side faces of said first electronic component.

2. The module of claim 1 wherein said carrier material is a substrate.

3. The module of claim 2 wherein said substrate comprises a material selected from the group consisting of FR4, ceramic and polyimide.

4. The module of claim 1 wherein said carrier material is selected from the group consisting of a pair of leads of ferrous or non-ferrous material wherein a first lead of said pair of leads is said first conductive portion and a second lead of said pair of leads is said second conductive portion.

5. The module of claim 4 wherein said first conductive portion is a conductive trace on said substrate.

6. The module of claim 5 wherein said conductive trace is linear.

7. The module of claim 5 wherein said conductive trace deviates from linearity.

8. The module of claim 7 comprising electronic components of different sizes connected to said conductive trace.

9. The module of claim 4 wherein said first lead comprises an offset.

10. The module of claim 9 wherein said offset is selected from laterally offset and horizontally offset.

11. The module of claim 4 wherein said first lead is selected from a round lead frame and a flat lead.

12. The module of claim 11 wherein said first lead comprises at least one flattened region.

13. The module of claim 4 wherein said first lead is selected from a through-hole lead, surface mount lead and a compliant pin lead.

14. The module of claim 13 further comprising a through-hole assembly stand-off feature.

15. The module of claim 4 wherein said first lead comprises a material selected from a ferrous material and a non-ferrous material.

16. The module of claim 1 wherein said first longitudinal edge of said second electronic component is connected to said first conductive portion by an additional interconnect.

17. The module of claim 1 wherein a second longitudinal edge of said second electronic component is connected to a first longitudinal edge of a third electronic component by an additional interconnect.

18. The module of claim 1 wherein said multiplicity of electronic components are arranged in rows and columns wherein adjacent electronic components in said columns have adjacent longitudinal edges connected by an additional interconnect.

19. The module of claim 1 wherein at least one of said first interconnect or said second interconnect is selected from the group consisting of a transient liquid phase sintering conductive interconnect material.

20. The module of claim 1 wherein each said electronic component is independently selected from the group consisting of a capacitor, a diode, a resistor, a varistor, an inductor, a fuse and an integrated circuit.

21. The module of claim 20 wherein at least one said electronic component is a capacitor.

22. The module of claim 21 wherein each said electronic component is a capacitor.

23. The module of claim 22 wherein each said capacitor is an MLCC.

24. The module of claim 1 wherein at least two said electronic components have a different size.

25. The module of claim 1 further comprising an encapsulation.

26. The module of claim 1 further comprising an over-molded lead frame or pre-molded housing.

27. The module of claim 1 comprising at least 2 electronic components to no more than 100 electronic components.

28. A module comprising:

a carrier material comprising a first conductive portion and a second conductive portion;

a multiplicity of electronic components wherein each electronic component of said electronic components comprises a first external termination with at least one first longitudinal edge and a second external termination with at least one second longitudinal edge;

a first electronic component of said multiplicity of electronic components wherein said first longitudinal edge of said first electronic component is connected to said first conductive portion by a first interconnect;

a second electronic component of said multiplicity of electronic components wherein said first longitudinal edge of said second electronic component is connected to said first conductive portion by said first interconnect;

and

said second longitudinal edge of said first electronic component is connected to said second conductive portion by a second interconnect;

wherein said carrier material is selected from the group consisting of a pair of leads of ferrous or non-ferrous material wherein a first lead of said pair of leads is said first conductive portion and a second lead of said pair of leads is said second conductive portion; and

wherein said first lead is a flat plated lead with at least one said electronic component on each side of said flat plated lead.

29. A method for forming a module comprising:

providing a multiplicity of electronic components wherein each electronic component of said electronic components comprises a first external termination with at least one first longitudinal edge wherein said first longitudinal edge is on a side face of four side faces of each electronic component of said electronic components and a second external termination with at least one second longitudinal edge;

placing a first conductor into contact with each said first longitudinal edge with a first interconnect between said first conductor and said first longitudinal edge;

placing a second conductor into contact with said second longitudinal edge with a second interconnect between said second conductor and said second longitudinal edge; and

heating to form a bond of said first interconnect and said second interconnect.

30. The method for forming a module of claim 29 wherein said first conductor is selected from the group consisting of a first lead and a circuit trace on a substrate.

31. The method for forming a module of claim 30 wherein said first lead comprises an offset.

32. The method for forming a module of claim 31 wherein said offset is selected from laterally offset and horizontally offset.

33. The method for forming a module of claim 30 wherein said first lead is selected from a round lead frame and a flat lead.

34. The method for forming a module of claim 33 wherein said first lead comprises at least one flattened region.

35. The method for forming a module of claim 30 wherein said first lead is selected from a through-hole lead and a surface mount lead.

36. The method for forming a module of claim 35 further comprising a through-hole assembly stand-off feature.

37. The method for forming a module of claim 30 wherein said first lead comprises a material selected from a ferrous material and a non-ferrous material.

38. The method for forming a module of claim 29 comprising bonding said first conductor to each first longitudinal edge by said first interconnect.

39. The method for forming a module of claim 29 wherein at least one of said first interconnect or said second interconnect is a transient liquid phase sintering conductive interconnect material.

40. The method for forming a module of claim 29 wherein each said electronic component is independently selected from the group consisting of a capacitor, a diode, a resistor, a varistor, an inductor, a fuse and an integrated circuit.

41. The method for forming a module of claim 40 wherein at least one said electronic component is a capacitor.

42. The method for forming a module of claim 41 wherein each said electronic component is a capacitor.

43. The method for forming a module of claim 42 wherein each said capacitor is an MLCC.

44. The method for forming a module of claim 29 wherein at least two said electronic components have a different size.

45. The method for forming a module of claim 29 further comprising forming an encapsulation.

46. The method for forming a module of claim 29 comprising at least 2 electronic components to no more than 100 electronic components.

47. The method for forming a module of claim 29 further comprising placing at least one electronic component in a second row or a second column with an interconnect between adjacent longitudinal edges and forming a bond of said interconnect.

48. A method for forming a module comprising:

providing a multiplicity of electronic components wherein each electronic component of said electronic components comprises a first external termination with at least one first longitudinal edge and a second external termination with at least one second longitudinal edge;

placing a first conductor into contact with each said first longitudinal edge with a first interconnect between said first conductor and said first longitudinal edge;

placing a second conductor into contact with said second longitudinal edge with a second interconnect between said second conductor and said second longitudinal edge; and

heating to form a bond of said first interconnect and said second interconnect;

wherein said first conductor is selected from the group consisting of a first lead and a circuit trace on a substrate wherein said first lead is a flat plated lead with at least one said electronic component on each side of said flat plated lead.

49. A module comprising:

a carrier material comprising a first conductive portion and a second conductive portion;

a multiplicity of electronic components wherein each electronic component of said electronic components comprises a first external termination with at least one first longitudinal edge and a second external termination with at least one second longitudinal edge wherein said first longitudinal edge is on a first side face of four side faces of said first electronic component; and

a row comprising at least two electronic components of said multiplicity of electronic components wherein each said first longitudinal edge of said at least two electronic components is in contact with said first interconnect.

50. The module of claim 49 wherein said carrier material is a substrate.

51. The module of claim 50 wherein said substrate comprises a material selected from the group consisting of FR4, ceramic and polyimide.

52. The module of claim 49 wherein said carrier material is selected from the group consisting of a pair of leads of ferrous or non-ferrous material wherein a first lead of said pair of leads is said first conductive portion and a second lead of said pair of leads is said second conductive portion.

53. The module of claim 52 wherein said first conductive portion is a conductive trace on said substrate.

54. The module of claim 53 wherein said conductive trace is linear.

55. The module of claim 53 wherein said conductive trace deviates from linearity.