Pixel isolation elements, devices and associated methods

• US 10,224,359 B2
• Filed: 07/21/2016
• Issued: 03/05/2019
• Est. Priority Date: 03/22/2012
• Status: Active Grant

• Current Assignee: SiOnyx, LLC (DC Capital Partners, LLC)
• Original Assignee: SiOnyx, LLC (DC Capital Partners, LLC)
• Inventors: Pralle, Martin U., McKee, Jeffrey, Sickler, Jason
• Primary Examiner(s): Pham, Long
• Application Number:
  US15/216,244
• Publication Number:
  US 20160329366A1
• Time in Patent Office: 957 Days
• Field of Search: None
• CPC Class Codes: H01L 27/14607 Geometry of the photosensitive area
• CPC Class Codes: H01L 27/1462 Coatings
• CPC Class Codes: H01L 27/14625 Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14629 Reflectors
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

Light trapping pixels, devices incorporating such pixels, and various associated methods are provided. In one aspect, for example, a light trapping pixel device can include a light sensitive pixel having a light incident surface, a backside surface opposite the light incident surface, and a peripheral sidewall disposed into at least a portion of the pixel and extending at least substantially around the pixel periphery. The pixel can also include a backside light trapping material substantially covering the backside surface and a peripheral light trapping material substantially covering the peripheral sidewall. The light contacting the backside light trapping material or the peripheral light trapping material is thus reflected back toward the pixel.

Claims

1. An imager device, comprising:

at least two adjacent light sensitive image sensor pixels each having a light incident surface, and a backside surface opposite the light incident surface;

a peripheral isolation element at least partially separating said two adjacent light sensitive pixels;

each of said pixels having at least one doped region disposed on at least one of the light incident surface and the backside surface,

wherein the peripheral isolation element comprises at least two materials having different indices of refraction,

wherein said peripheral isolation element comprises a first, a second and a third layer, wherein said third layer is disposed between said first and second layers, and wherein each of said first and second layer exhibits an index of refraction less than an index of refraction of said third layer.

2. The device of claim 1, wherein the index of refraction of at least one of said first and second layer is at least 0.2 lower relative to the refractive index of the third layer.

3. The device of claim 1, wherein at least of one of said at least two materials comprises silicon dioxide.

4. The device of claim 1, wherein at least one of said first and second layers comprises silicon dioxide.

5. The device of claim 1, wherein the isolation element extends substantially from the light incident surface to the backside surface of at least one of said two adjacent light sensitive pixels.

6. The device of claim 1, wherein at least one of the first and second layer comprises Al₂O₃.

7. The device of claim 1, wherein said peripheral isolation element comprises an oxide.

8. The device of claim 1, wherein said peripheral isolation element provides a passivating negative charge.

9. The device of claim 1, wherein said peripheral isolation element exhibits a surface recombination velocity as low as 10 cm/s.

10. The device of claim 1, wherein the peripheral isolation element comprises at least one material having an index of refraction of less than about 2.1.

11. The device of claim 1, wherein the peripheral isolation element comprises any of aluminum oxide and hafnium oxide.

12. The device of claim 1, wherein at least one of said two adjacent light sensitive pixels comprises a textured region.

13. The device of claim 12, wherein said textured region is coupled to the light incident surface.

14. The device of claim 13, wherein said light incident surface comprises said textured region.

15. The device of claim 13, wherein said textured region comprises a textured film layer.

16. The device of claim 15, wherein said textured film layer comprises any of silicon dioxide, silicon nitride, amorphous silicon, polysilicon, a metal and combinations thereof.

17. The device of claim 12, wherein said backside surface comprises said textured region.

27. The device of claim 12, wherein the textured region is formed by one of plasma etching, reactive ion etching, porous silicon etching, lasing, chemical etching, nanoimprinting, material deposition, selective epitaxial growth, and combinations thereof.

28. The device of claim 12, wherein the textured region is formed by laser radiation.

29. The device of claim 12, wherein said textured region is coupled to the backside surface.

30. The device of claim 1, wherein said peripheral isolation element comprises tantalum oxide.

31. The device of claim 30, wherein said tantalum oxide comprises tantalum aluminum oxynitride.

32. The device of claim 1, wherein said peripheral isolation element comprises lanthanum oxide.

33. The device of claim 32, wherein said lanthanum oxide comprises lanthanum aluminum oxide.

38. The device of claim 1, wherein each of said at least two adjacent light sensitive image sensor pixels comprises a semiconductor portion providing said light incident surface and said backside surface, wherein said peripheral isolation element isolates the semiconductor portions of said at least two adjacent light sensitive image sensor pixels.

39. The device of claim 38, wherein said peripheral isolation element optically isolates said semiconductor portions of said at least two adjacent light sensitive image sensor pixels.

40. The device of claim 38, wherein said peripheral isolation element electrically isolates said semiconductor portions of said at least two adjacent light sensitive image sensor pixels.

41. The device of claim 38, wherein an index of refraction of the semiconductor portion of each of said at least two adjacent image sensor pixels is different from indices of refraction of said layers of the peripheral isolation element such that light incident from each of said semiconductor portions on said peripheral isolation element is reflected, thereby providing optical isolation between the pixels.

42. The device of claim 1, wherein said at least two adjacent light sensitive image sensor pixels are formed monolithically on a common semiconductor substrate and are isolated from one another by said peripheral isolation element.

43. The device of claim 1, wherein said peripheral isolation element is a trench isolation element.

44. The device of claim 1, wherein said peripheral isolation element has a width in a range from about 100 nm to about 50 microns.

52. The imager device of claim 38, wherein at least one of the first layer and the second layer of said peripheral isolation element and said semiconductor portion of each of said at least two adjacent pixels comprise different materials.

53. The imager device of claim 1, wherein the first layer and the second layer of said peripheral isolation element comprise different materials.

54. The imager device of claim 1, wherein the peripheral isolation element comprises at least three materials.

55. The imager device of claim 1, wherein the peripheral isolation element comprises more than three layers.

56. The imager device of claim 1, wherein the peripheral isolation element comprises a light trapping material filling a trench.

57. The imager device of claim 56, wherein the trench is one of a shallow trench and a deep trench.

64. The imager device of claim 1, wherein said peripheral isolation element comprises a trench isolation element formed by filling a trench with said first, said second, and said third layers.

65. The imager device of claim 64, wherein said trench isolation element has a depth in a range of about 100 nm to about 50 microns.

66. The imager device of claim 65, wherein said trench isolation element has a width in a range of about 100 nm to about 10 microns.

67. The imager device of claim 1, wherein said peripheral isolation element is configured to reflect at least a portion of light incident thereon from any of said two adjacent light sensitive pixels back to that pixel.

68. The imager device of claim 67, wherein the peripheral isolation element is further configured to optically isolate said two adjacent light sensitive pixels.

69. The imager device of claim 68, wherein the peripheral isolation element is further configured to electrically isolate said two adjacent light sensitive pixels.

76. The imager device of claim 1, wherein the peripheral isolation element comprises a textured region.

77. The imager device of claim 1, wherein the peripheral isolation element further comprises a first textured region between the first layer and one of said adjacent pixels and a second textured region between the second layer and the other one of said adjacent pixels.

80. The imager device of claim 1, wherein the peripheral isolation element comprises five layers.

81. The imager device of claim 80, wherein the five layers include the first layer, the second layer, the third layer, a fourth layer disposed between the first layer and one of said adjacent pixels and a fifth layer disposed between the second layer and the other one of said adjacent pixels.

18. An imager device, comprising:

at least two adjacent light sensitive image sensor pixels each having a light incident surface, and a backside surface opposite the light incident surface;

a peripheral isolation element separating said at least two adjacent light sensitive pixels so as to reduce optical crosstalk therebetween, said isolation element comprising at least two materials having different indices of refraction,

at least one doped region disposed on at least one of the light incident surface and the backside surface,

wherein said peripheral isolation element comprises a first, a second and a third layer, wherein said third layer is disposed between said first and second layers, and wherein each of said first and second layers exhibits an index of refraction less than an index of refraction of said third layer.

19. The device of claim 18, wherein at least one of said light incident surface and said backside surface of at least one of said two adjacent light sensitive pixels comprises a textured region.

20. The device of claim 19, wherein said textured region is a textured film layer.

21. The device of claim 20, wherein said textured film layer comprises any of silicon dioxide, silicon nitride, amorphous silicon, polysilicon, a metal and combinations thereof.

22. The device of claim 19, wherein said textured region reflects at least a portion of light internally incident thereon into the at least one pixel.

23. The device of claim 18, wherein the peripheral isolation element extends from the light incident surface to the backside surface of at least one of said two adjacent light sensitive pixels.

24. The device of claim 18, wherein said at least two materials comprises silicon dioxide and aluminum oxide.

25. The device of claim 19, wherein said at least two pixels are formed monolithically in a common semiconductor substrate.

26. The device of claim 19, wherein the textured region is formed by laser radiation.

34. The device of claim 18, wherein said peripheral isolation element comprises tantalum oxide.

35. The device of claim 34, wherein said tantalum oxide comprises tantalum aluminum oxynitride.

36. The device of claim 18, wherein said peripheral isolation element comprises lanthanum oxide.

37. The device of claim 36, wherein said lanthanum oxide comprises lanthanum aluminum oxide.

45. The device of claim 18, wherein each of said at least two adjacent light sensitive image sensor pixels comprises a semiconductor portion providing said light incident surface and said backside surface, wherein said peripheral isolation element isolates the semiconductor portions of said at least two adjacent light sensitive image sensor pixels.

46. The device of claim 45, wherein said peripheral isolation element optically isolates said semiconductor portions of said at least two adjacent light sensitive image sensor pixels.

47. The device of claim 46, wherein said peripheral isolation element electrically isolates said semiconductor portions of said at least two adjacent light sensitive image sensor pixels.

48. The device of claim 47, wherein an index of refraction of the semiconductor portion of each of said at least two adjacent image sensor pixels is different from indices of refraction of said layers of the peripheral isolation element such that light incident from each of said semiconductor portions on said peripheral isolation element is reflected, thereby providing optical isolation between the pixels.

49. The device of claim 18, wherein said at least two adjacent light sensitive image sensor pixels are formed monolithically on a common semiconductor substrate and are isolated from one another by said peripheral isolation element.

50. The device of claim 18, wherein said peripheral isolation element is a trench isolation element.

51. The device of claim 18, wherein said peripheral isolation element has a width in a range from about 100 nm to about 50 microns.

58. The imager device of claim 45, wherein at least one of the first layer and the second layer of the peripheral isolation element and said semiconductor portion of each of said at least two adjacent pixels comprise different materials.

59. The imager device of claim 18, wherein the first layer and the second layer of said peripheral isolation element comprise different materials.

60. The imager device of claim 18, wherein the peripheral isolation element comprises at least three materials.

61. The imager device of claim 18, wherein the peripheral isolation element comprises more than three layers.

62. The imager device of claim 18, wherein the peripheral isolation element comprises a light trapping material filling a trench.

63. The imager device of claim 62, wherein the trench is one of a shallow trench and a deep trench.

70. The imager device of claim 18, wherein said peripheral isolation element comprises a trench isolation element formed by filling a trench with said first, said second, and said third layers.

71. The imager device of claim 70, wherein said trench isolation element has a depth in a range of about 100 nm to about 50 microns.

72. The imager device of claim 71, wherein said trench isolation element has a width in a range of about 100 nm to about 10 microns.

73. The imager device of claim 18, wherein said peripheral isolation element is configured to reflect at least a portion of light incident thereon from any of said two adjacent light sensitive pixels back to that pixel.

74. The imager device of claim 73, wherein the peripheral isolation element is further configured to optically isolate said two adjacent light sensitive pixels.

75. The imager device of claim 74, wherein the peripheral isolation element is further configured to electrically isolate said two adjacent light sensitive pixels.

78. The imager device of claim 18, wherein the peripheral isolation element comprises a textured region.

79. The imager device of claim 18, wherein the peripheral isolation element further comprises a first textured region between the first layer and one of said adjacent pixels and a second textured region between the second layer and the other one of said adjacent pixels.

82. The imager device of claim 18, wherein the peripheral isolation element comprises five layers.

83. The imager device of claim 82, wherein the five layers include the first layer, the second layer, the third layer, a fourth layer disposed between the first layer and one of said adjacent pixels and a fifth layer disposed between the second layer and the other one of said adjacent pixels.