Selector device incorporating conductive clusters for memory applications

• US 10,224,367 B2
• Filed: 05/18/2016
• Issued: 03/05/2019
• Est. Priority Date: 05/18/2016
• Status: Active Grant

• Current Assignee: Avalanche Technology Incorporated
• Original Assignee: Avalanche Technology Incorporated
• Inventors: Yang, Hongxin, Satoh, Kimihiro, Wang, Xiaobin
• Primary Examiner(s): Ahmad, Khaja
• Application Number:
  US15/157,607
• Publication Number:
  US 20170338279A1
• Time in Patent Office: 1,021 Days
• Field of Search: None
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements
• CPC Class Codes: H10B 63/20 comprising selection components having two electrodes, e.g. diodes
• CPC Class Codes: H10B 63/84 arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
• CPC Class Codes: H10N 70/245 the species being metal cations, e.g. programmable metallization cells
• CPC Class Codes: H10N 70/841 Electrodes
• CPC Class Codes: H10N 70/881 Switching materials

Abstract

The present invention is directed to a memory device that includes an array of memory cells. Each of the memory cells includes a memory element connected to a two-terminal selector element. The two-terminal selector element includes a first electrode and a second electrode with a switching layer interposed therebetween. The switching layer includes a plurality of metal-rich clusters embedded in a nominally insulating matrix. One or more conductive paths are formed in the switching layer when an applied voltage to the memory cell exceeds a threshold level. Each of the memory cells may further include an intermediate electrode interposed between the memory element and the two-terminal selector element. The two-terminal selector element may further include a third electrode formed between the first electrode and the switching layer, and a fourth electrode formed between the second electrode and the switching layer.

Claims

1. A memory device comprising an array of memory cells, each of said memory cells including a memory element connected to a two-terminal selector element, said two-terminal selector element comprising a first electrode and a second electrode with a switching layer interposed therebetween, said switching layer including a plurality of metal-rich clusters embedded in a matrix, wherein said switching layer has single resistance state in absence of an applied voltage thereto.

2. The memory device of claim 1 further comprising:

a plurality of first conductor lines extending along a first direction, each of said first conductor lines being coupled to a respective row of said memory cells at one ends; and

a plurality of second conductor lines extending along a second direction substantially perpendicular to said first direction, each of said second conductor lines being coupled to a respective row of said memory cells at the other ends.

3. The memory device of claim 1, wherein said matrix is made of a chalcogenide.

4. The memory device of claim 1, wherein said matrix is made of an oxide.

5. The memory device of claim 1, wherein said matrix is made of an insulator.

6. The memory device of claim 1, wherein said matrix is noncrystalline.

7. The memory device of claim 1, wherein said plurality of metal-rich clusters are made of a material selected from the group consisting of silver, copper, zinc, titanium, titanium nitride, tantalum nitride, tungsten, and any combinations thereof.

8. The memory device of claim 1, wherein said first and second electrodes are made of a same material.

9. The memory device of claim 1, wherein each of said first and second electrodes is made of a material selected from the group consisting of platinum, iridium, ruthenium, gold, and any combinations thereof.

10. The memory device of claim 1, wherein said plurality of metal-rich clusters and at least one of said first and second electrodes are made of a same material.

11. The memory device of claim 1, wherein each of said memory cells further includes an intermediate electrode interposed between said memory element and said two-terminal selector element.

12. The memory device of claim 11, wherein said intermediate electrode is made of a silicide or a nitride.

13. The memory device of claim 1, wherein said memory element includes a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween.

14. The memory device of claim 13, wherein said magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof, said magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof.

15. The memory device of claim 1, wherein said two-terminal selector element further comprises:

a third electrode formed between said first electrode and said switching layer; and

a fourth electrode formed between said second electrode and said switching layer.

16. The memory device of claim 15, wherein said third and fourth electrodes are made of a same material.

17. The memory device of claim 15, wherein said plurality of metal-rich clusters and at least one of said third and fourth electrodes are made of a same material.

18. The memory device of claim 15, wherein said plurality of metal-rich clusters are made of a material selected from the group consisting of titanium nitride, tantalum nitride, tungsten, and any combinations thereof, each of said third and fourth electrodes is made of a material selected from the group consisting of silver, copper, zinc, titanium, and any combinations thereof.

19. The memory device of claim 15, wherein each of said first and second electrodes is made of a material selected from the group consisting of platinum, iridium, ruthenium, and any combinations thereof, said plurality of metal-rich clusters and said third and fourth electrodes are made of a same material selected from the group consisting of silver, copper, zinc, titanium, and any combinations thereof.

20. A memory device comprising an array of memory cells, each of said memory cells including a memory element connected to a two-terminal selector element, said two-terminal selector element comprising a first electrode and a second electrode with a switching layer interposed therebetween, said switching layer including a plurality of metal-rich clusters embedded in a matrix, wherein each of said first and second electrodes is made of a material selected from the group consisting of iridium, ruthenium, and any combinations thereof.