On-die impedance calibration

• US 10,224,928 B1
• Filed: 03/23/2018
• Issued: 03/05/2019
• Est. Priority Date: 03/23/2018
• Status: Active Grant

• Current Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Mathur, Shiv Harit, Subramanian, Ramakrishnan, Gupta, Nitin
• Primary Examiner(s): Tan, Vibol
• Application Number:
  US15/934,379
• Time in Patent Office: 347 Days
• CPC Class Codes: G11C 11/40615 Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
• CPC Class Codes: G11C 2207/2254 Calibration
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence
• CPC Class Codes: G11C 7/1051 Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
• CPC Class Codes: G11C 7/1057 Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
• CPC Class Codes: G11C 7/1084 Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
• CPC Class Codes: G11C 7/1093 Input synchronization
• CPC Class Codes: G11C 7/222 Clock generating, synchronizing or distributing circuits within memory device
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 19/0005 Modifications of input or output impedance
• CPC Class Codes: H03K 19/017545 Coupling arrangements; Impedance matching circuits
• CPC Class Codes: H04L 25/0278 Arrangements for impedance matching

Abstract

Apparatuses, systems, methods, and computer program products are disclosed for on-die impedance calibration. A calibration circuit determines a digital compensation value for an input/output driver. A calibration adjustment circuit provides a digital compensation value to a calibration circuit to produce an analog output corresponding to the digital compensation value. A feedback circuit provides an analog output as feedback to a calibration circuit to produce an analog compensation value.

Claims

1. An apparatus comprising:

a calibration circuit that determines a digital compensation value for an input/output driver;

a calibration adjustment circuit that provides the digital compensation value to the calibration circuit to produce an analog output corresponding to the digital compensation value; and

a feedback circuit that provides the analog output as feedback to the calibration circuit to produce an analog compensation value.

2. The apparatus of claim 1, wherein the digital compensation value is determined from an analog value.

3. The apparatus of claim 2, wherein the digital compensation value is rounded down to a nearest digital value that has an analog equivalent that is less than the analog value.

4. The apparatus of claim 3, wherein the analog value is a sum of the analog equivalent and the analog compensation value.

5. The apparatus of claim 1, wherein the calibration circuit produces a calibration completion output in response to determining the digital compensation value.

6. The apparatus of claim 5, wherein the feedback circuit produces the analog compensation value in response to the calibration completion output being produced.

7. The apparatus of claim 5, further comprising a control circuit that receives an indication of the calibration completion output and provides an enable output to the feedback circuit to enable the feedback circuit.

8. The apparatus of claim 7, wherein the control circuit provides a calibration adjustment completion output in response to producing the analog compensation value.

9. The apparatus of claim 1, wherein the feedback circuit comprises an amplifier that outputs the analog compensation value based on inputs comprising the analog output and a reference voltage based on a supply voltage.

10. The apparatus of claim 1, wherein the calibration circuit determines a plurality of digital compensation values comprising the digital compensation value, and the feedback circuit determines a plurality of analog compensation values comprising the analog compensation value.

11. A method comprising:

receiving a digital impedance input;

receiving an analog impedance input;

providing the digital impedance input and the analog impedance input to an impedance matching circuit to produce an analog result; and

determining a local digital impedance output based on the digital impedance input, the analog impedance input, and the analog result.

12. The method of claim 11, wherein determining the local digital impedance output comprises applying a trim digital impedance input to the impedance matching circuit.

13. The method of claim 12, wherein an initial value for the trim digital impedance input is determined based on the digital impedance input.

14. The method of claim 13, wherein the initial value for the trim digital impedance input is determined by looking up the digital impedance input in a table.

15. The method of claim 12, further comprising adjusting the trim digital impedance input until the analog result matches a predetermined voltage.

16. The method of claim 15, further comprising storing the trim digital impedance input as the local digital impedance output in response to the analog result matching the predetermined voltage.

17. The method of claim 11, further comprising producing a local analog impedance output based on the local digital impedance output and the analog impedance input.

18. An apparatus comprising:

means for generating an analog impedance compensation value, for an electrical signal driver, based on a digital impedance compensation value;

means for generating a local analog impedance compensation value at the electrical signal driver; and

means for generating an output voltage based on the digital impedance compensation value, the analog impedance compensation value, and the local analog impedance compensation value.

19. The apparatus of claim 18, further comprising means for accessing a local digital impedance compensation value at the electrical signal driver.

20. The apparatus of claim 18, wherein the means for generating the local analog impedance compensation value comprises means for receiving the analog impedance compensation value and the local digital impedance compensation value, and means for producing the local analog impedance compensation value based on the analog impedance compensation value and the local digital impedance compensation value.