Variable-term error metrics adjustment

• US 10,228,990 B2
• Filed: 06/28/2016
• Issued: 03/12/2019
• Est. Priority Date: 11/12/2015
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Song, Yiwei, Yang, Nian Niles, Fitzpatrick, James
• Primary Examiner(s): Wilson, Yolanda L
• Application Number:
  US15/195,910
• Publication Number:
  US 20170139761A1
• Time in Patent Office: 987 Days
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0754 by exceeding limits
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/08 Error detection or correction by redundancy in data representation, e.g. by using checking codes
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 12/02 Addressing or allocation; Relocation program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/4401 for self repair

Abstract

Systems, methods and/or devices are used to adjust error metrics for a memory portion of non-volatile memory in a storage device. In one aspect, a first write and a first read are performed on the memory portion. In accordance with results of the first read, a first error metric value for the memory portion is determined. In accordance with a determination that the first error metric value exceeds a first threshold value, an entry for the memory portion is added to a table. After the first write, when a second write to the memory portion is performed, it is determined whether the entry for the memory portion is present in the table. In accordance with a determination that the entry for the memory portion is present in the table, the second write uses a first error adjustment characteristic that is determined in accordance with the first error metric value.

Claims

1. A method for adjusting error metrics for a memory portion of non-volatile memory in a storage device, the non-volatile memory of the storage device having a plurality of distinct memory portions, the method comprising:

performing a first write to the memory portion;

performing a first read on the memory portion;

in accordance with results of the performed first read, determining a first error metric value for the memory portion;

determining whether the first error metric value exceeds a first threshold value;

in accordance with a determination that the first error metric value exceeds the first threshold value, adding an entry for the memory portion to an error adjustment characteristics table;

determining, for a second write to the memory portion, whether an entry for the memory portion is present in the error adjustment characteristics table, wherein the second write occurs after the first write; and

in accordance with a determination that the entry for the memory portion is present in the error adjustment characteristics table, performing the second write using a first error adjustment characteristic, wherein the first error adjustment characteristic is determined in accordance with the first error metric value.

2. The method of claim 1, wherein the entry added to the error adjustment characteristics table for the memory portion includes identifying information for the memory portion.

3. The method of claim 1, further comprising:

performing a second read on the memory portion;

in accordance with results of the performed second read, determining a second error metric value for the memory portion;

determining whether the second error metric value exceeds the first threshold value;

in accordance with a determination that the second error metric value does not exceed the first threshold value, removing the entry for the memory portion from the error adjustment characteristics table.

4. The method of claim 3, further comprising:

wherein the entry added to the error adjustment characteristics table includes the first error adjustment characteristic; and

in accordance with a determination that the second error metric exceeds the first threshold value, updating the entry to replace the first error adjustment characteristic with a second error adjustment characteristic.

5. The method of claim 3, further comprising:

wherein the entry added to the error adjustment characteristics table further includes the first error metric value;

in accordance with a determination that the second error metric exceeds the first threshold value, updating the entry to replace the first error metric value with the second error metric value.

6. The method of claim 1, further comprising:

determining whether the first error metric value exceeds a second threshold value; and

,

in accordance with a determination that the first error metric value exceeds the second threshold value, write the data of the first write to an alternative memory portion that is distinct from the memory portion.

7. The method of claim 1, wherein the first error adjustment characteristic includes an increased number of parity bits, used for the second write, that is greater than a first number of parity bits used for the first write.

8. The method of claim 1, wherein the first error adjustment characteristic includes an adjusted write voltage level for the second write that is different from a first voltage level used for the first write.

9. The method of claim 1, wherein the first error adjustment characteristic includes padding data for the second write.

10. The method of claim 1, wherein the storage device comprises one or more three-dimensional (3D) memory devices and circuitry associated with operation of memory elements in the one or more 3D memory devices.

11. The method of claim 10, wherein the circuitry and one or more memory elements in a respective 3D memory device, of the one or more 3D memory devices, are on the same substrate.

12. A storage device, comprising:

a non-volatile memory, the non-volatile memory having a plurality of distinct memory portions;

one or more processors;

a memory storing one or more programs, which when executed by the one or more processors cause the storage device to;

perform a first write to the memory portion;

perform a first read on the memory portion;

in accordance with results of the performed first read, determine a first error metric value for the memory portion;

determine whether the first error metric value exceeds a first threshold value;

in accordance with a determination that the first error metric value exceeds the first threshold value, add an entry for the memory portion to an error adjustment characteristics table;

determine, for a second write to the memory portion, whether the entry for the memory portion is present in the error adjustment characteristics table, wherein the second write occurs after the first write; and

in accordance with a determination that the entry for the memory portion is present in the error adjustment characteristics table, performing the second write using a first error adjustment characteristic, wherein the first error adjustment characteristic is determined in accordance with the first error metric value.

13. The storage device of claim 12, wherein the one or more processors comprise one or more processors of a storage controller of the storage device, and the one or more programs include an error metrics determination module to determine the first error metric for the memory portion and determine whether the first error metric value exceeds a first threshold value, and an error correction adjustment module for adding or adjusting an error adjustment characteristic for the memory portion.

14. The storage device of claim 12, wherein the one or more programs, when executed by the one or more processors, further cause the storage device to:

perform a second read on the memory portion;

in accordance with results of the performed second read, determine a second error metric value for the memory portion;

determine whether the second error metric value exceeds the first threshold value;

in accordance with a determination that the second error metric value does not exceed the first threshold value, remove the entry for the memory portion from the error adjustment characteristics table.

15. The storage device of claim 14, wherein

the entry added to the error adjustment characteristics table includes the first error adjustment characteristic;

and

the one or more programs, when executed by the one or more processors, further cause the storage device to update the entry to replace the first error adjustment characteristic with a second error adjustment characteristic in accordance with a determination that the second error metric exceeds the first threshold value.

16. The storage device of claim 14, wherein

the entry added to the error adjustment characteristics table further includes the first error metric value;

the one or more programs, when executed by the one or more processors, further cause the storage device to update the entry to replace the first error metric value with the second error metric value in accordance with a determination that the second error metric exceeds the first threshold value.

17. The storage device of claim 12, wherein the one or more programs, when executed by the one or more processors, further cause the storage device to:

determine whether the first error metric value exceeds a second threshold value; and

,

in accordance with a determination that the first error metric value exceeds the second threshold value, write the data of the first write to an alternative memory portion that is distinct from the memory portion.

18. The storage device of claim 12, wherein the first error adjustment characteristic includes an increased number of parity bits, used for the second write, that is greater than a first number of parity bits used for the first write.

19. The storage device of claim 12, wherein the first error adjustment characteristic includes an adjusted write voltage level for the second write that is different from a first voltage level used for the first write.

20. The storage device of claim 12, wherein the first error adjustment characteristic includes padding data for the second write.