Voltage regulator power reporting offset system

• US 10,229,027 B2
• Filed: 04/15/2016
• Issued: 03/12/2019
• Est. Priority Date: 04/15/2016
• Status: Active Grant

• Current Assignee: Dell Products LP (Dell Technologies Inc.)
• Original Assignee: Dell Products LP (Dell Technologies Inc.)
• Inventors: Luo, Shiguo, Johnson, Ralph
• Primary Examiner(s): Abbaszadeh, Jaweed A
• Assistant Examiner(s): Harrington, Cheri L
• Application Number:
  US15/130,643
• Publication Number:
  US 20170300398A1
• Time in Patent Office: 1,061 Days
• Field of Search: None
• CPC Class Codes: G05F 5/00 Systems for regulating electric variables by detecting deviations in the electric input to the system and thereby controlling a device within the system to obtain a regulated output
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G06F 1/305 in the event of power-supply fluctuations
• CPC Class Codes: G06F 11/3024 where the computing system component is a central processing unit [CPU]
• CPC Class Codes: G06F 11/3062 where the monitored property is the power consumption power management in a computing system G06F1/3203
• CPC Class Codes: G06F 11/3065 Monitoring arrangements determined by the means or processing involved in reporting the monitored data error or fault reporting or logging G06F11/0766
• CPC Class Codes: G06F 11/3072 where the reporting involves data filtering, e.g. pattern matching, time or event triggered, adaptive or policy-based reporting
• CPC Class Codes: G06F 11/3089 Monitoring arrangements determined by the means or processing involved in sensing the monitored data, e.g. interfaces, connectors, sensors, probes, agents software debugging using additional hardware using a specific debug interface G06F11/3656; performance evaluation by tracing or monitoring G06F11/3466

Abstract

A voltage regulator power reporting offset system includes a monitored power reporting subsystem that determines a monitored power level, offsets the monitored power level using voltage regulator operation offset information to provide a first offset monitored power level, and reports the first offset monitored power level to voltage regulator operation components. A processor power reporting component receives the report of the first offset monitored power level from the monitored power reporting subsystem. A processor power reporting offset subsystem receives the report of the first offset monitored power level from the processor power reporting component, offsets the first offset monitored power level using the processor operation offset information to provide a second offset monitored power level that is different than the first offset monitored power level, and reports the second offset monitored power level to a processing system.

Claims

1. An Information Handling System (IHS), comprising:

a chassis;

a processing system that is housed in the chassis; and

a voltage regulator that is housed in the chassis and configured to provide power to the processing system, wherein the voltage regulator includes;

a monitored power reporting subsystem that includes voltage regulator operation offset information, wherein the monitored power reporting subsystem is configured to determine a monitored power level, offset the monitored power level using the voltage regulator operation offset information to provide a first offset monitored power level for use by a plurality of voltage regulator operation components, and report the first offset monitored power level to the plurality of voltage regulator operation components, wherein the voltage regulator operation offset information is configured to provide for operation of the plurality of voltage regulator operation components such that a full operational load range of the voltage regulator is achieved;

a processor power reporting component that is configured to receive the report of the first offset monitored power level from the monitored power reporting subsystem; and

a processor power reporting offset subsystem that is coupled between the processor power reporting component and the processing system and that includes processor operation offset information, wherein the processor power reporting offset subsystem is configured to receive the report of the first offset monitored power level from the processor power reporting component, offset the first offset monitored power level using the processor operation offset information to provide a second offset monitored power level that is different than the first offset monitored power level, and report the second offset monitored power level to the processing system, wherein the processor operation offset information is configured to provide over-clocking of the processing system.

2. The IHS of claim 1, further comprising:

a controller that is housed in the chassis and coupled to the voltage regulator, wherein the controller is configured to provide the processor operation offset information to the processor power reporting offset system.

3. The IHS of claim 2, wherein the controller is configured to monitor at least one performance level of the processing system that results based on the reporting of the first offset monitored power level to the processing system and, in response, determine the processor operation offset information.

4. The IHS of claim 1, wherein the plurality of voltage regulator operation components include at least one of an overcurrent protection component, a voltage positioning component, and an autophase component that are configured to use the report of the first offset monitored power level to perform at least one voltage regulator operation.

5. The IHS of claim 1, wherein the second offset monitored power level is lower than the first offset monitored power level and the reporting of the second offset monitor power level to the processing system provides for increased performance of the processing system relative to a performance level of the processing system that results based on reporting the first offset monitored power level to the processing system.

6. The IHS of claim 1, wherein the second offset monitored power level is higher than the first offset monitored power level and the reporting of the second offset monitor power level to the processing system provides for decreased performance of the processing system relative to a performance level of the processing system that results based on reporting the first offset monitored power level to the processing system.

7. A voltage regulator power reporting offset system, comprising:

a monitored power reporting subsystem that includes voltage regulator operation offset information, wherein the monitored power reporting subsystem is configured to determine a monitored power level, offset the monitored power level using the voltage regulator operation offset information to provide a first offset monitored power level for use by a plurality of voltage regulator operation components, and report the first offset monitored power level to the plurality of voltage regulator operation components, wherein the voltage regulator operation offset information is configured to provide for operation of the plurality of voltage regulator operation components such that a full operational load range of the plurality of voltage regulator operation components is achieved;

a processor power reporting component that is configured to receive the report of the first offset monitored power level from the monitored power reporting subsystem; and

a processor power reporting offset subsystem that is coupled between the processor power reporting component and a processing system connection and that includes processor operation offset information, wherein the processor power reporting offset subsystem is configured to receive the report of the first offset monitored power level from the processor power reporting component, offset the first offset monitored power level using the processor operation offset information to provide a second offset monitored power level that is different than the first offset monitored power level, and report the second offset monitored power level through the processing system connection, wherein the processor operation offset information is configured to provide over-clocking of a processing system that is coupled to the processing system connection.

8. The system of claim 7, wherein the processor power reporting offset subsystem includes a controller connection and is configured to receive the processor operation offset information through the controller connection.

9. The system of claim 7, wherein the plurality of voltage regulator operation components include at least one of an overcurrent protection component, a voltage positioning component, and an autophase component that are configured to use the report of the first offset monitored power level to perform at least one voltage regulator operation.

10. The system of claim 7, wherein the second offset monitored power level is lower than the first offset monitored power level and the reporting of the second offset monitor power level through the processing system connection provides for increased performance of a processing system relative to a performance level of the processing system that results based on reporting the first offset monitored power level to the processing system.

11. The system of claim 7, wherein the second offset monitored power level is higher than the first offset monitored power level and the reporting of the second offset monitor power level through the processing system connection provides for decreased performance of a processing system relative to a performance level of the processing system that results based on reporting the first offset monitored power level to the processing system.

12. A method for offsetting power reporting in a voltage regulator, comprising:

determining, by a monitored power reporting subsystem in a voltage regulator, a monitored power level;

offsetting, by the monitored power reporting subsystem, the monitored power level using voltage regulator operation offset information to provide a first offset monitored power level for use by a plurality of voltage regulator operation components;

reporting, by the monitored power reporting subsystem, the first offset monitored power level to the plurality of voltage regulator operation components, wherein the voltage regulator operation offset information provides for operation of the plurality of voltage regulator operation components such that a full operational load ramie of the voltage regulator is achieved;

receiving, by a processor power reporting component, the report of the first offset monitored power level from the monitored power reporting subsystem;

receiving, by a processor power reporting offset subsystem that is coupled between the processor power reporting component and a processing system, the report of the first offset monitored power level from the processor power reporting component;

offsetting, by the processor power reporting offset subsystem, the first offset monitored power level using processor operation offset information to provide a second offset monitored power level that is different than the first offset monitored power level; and

reporting, by the processor power reporting offset subsystem, the second offset monitored power level to the processing system, wherein the processor operation offset information is configured to provide over-clocking of the processing system.

13. The method of claim 12, further comprising:

providing, by a controller, the processor operation offset information to the processor power reporting offset system.

14. The method of claim 13, further comprising:

monitoring, by the controller, at least one performance level of the processing system that results based on the reporting of the first offset monitored power level to the processing system and, in response, determining the processor operation offset information.

15. The method of claim 12, wherein the plurality of voltage regulator operation components include at least one of an overcurrent protection component, a voltage positioning component, and an autophase component, and wherein the method further comprises:

using, by the at least one of the overcurrent protection component, the voltage positioning component, and the autophase component, the report of the first offset monitored power level to perform at least one voltage regulator operation.

16. The method of claim 12, wherein the second offset monitored power level is lower than the first offset monitored power level and the reporting of the second offset monitor power level to the processing system provides for increased performance of the processing system relative to a performance level of the processing system that results based on reporting the first offset monitored power level to the processing system.

17. The method of claim 12, wherein the second offset monitored power level is higher than the first offset monitored power level and the reporting of the second offset monitor power level to the processing system provides for decreased performance of the processing system relative to a performance level of the processing system that results based on reporting the first offset monitored power level to the processing system.