Method and system for storing and recovering data from flash memory

• US 10,229,734 B1
• Filed: 01/19/2018
• Issued: 03/12/2019
• Est. Priority Date: 05/19/2015
• Status: Active Grant

• Current Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Original Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Inventors: Nieuwejaar, Nils, Bonwick, Jeffrey S.
• Primary Examiner(s): Bradley, Matthew
• Application Number:
  US15/875,685
• Time in Patent Office: 417 Days
• CPC Class Codes: G06F 11/0727 in a storage system, e.g. in a DASD or network based storage system drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/0751 Error or fault detection not based on redundancy power supply failures G06F1/30; network fault management H04L41/06
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0644 Management of space entities, e.g. partitions, extents, pools
• CPC Class Codes: G06F 3/0646 Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits

Abstract

Embodiments of the technology relate to storing user data and metadata in persistent storage in the event of a power failure and then recovering such stored data and metadata when power is restored.

Claims

1. A method for storing data, comprising:

writing a frag to an open data page in vaulted memory, wherein the open data page comprises a first table of contents (TOC) bit and a first physical address;

writing a table of contents entry (TE) for the frag to an open TOC page in the vaulted memory, wherein the open TOC page comprises a second TOC bit and a second physical address;

making a first determination that the open data page is full;

based on the first determination, writing the frag to a page in a solid state memory module, wherein the page is associated with the first physical address,

wherein the solid state memory module and the vaulted memory are located in a storage module,

wherein the solid state memory module is flash memory.

2. The method of claim 1, further comprising:

writing a first tag to the open data page prior to writing the TE to the open TOC page, wherein a second tag in the open TOC page comprises the second TOC bit and the second physical address.

3. The method of claim 1, wherein the first physical address and the second physical address are located are associated with the same block in the solid state memory module.

4. The method of claim 1, further comprising:

making a second determination that the open TOC page is full;

based on the second determination, replacing the second physical address with a third physical address;

writing the TE to a second page in the solid state memory module, wherein the second page is associated with the third physical address.

5. The method of claim 4, wherein the first physical address and the third physical address are located are associated with the same block in the solid state memory module.

6. A storage module, comprising:

a memory comprising vaulted memory;

a solid state memory module; and

a storage module controller programmed to;

write a frag to an open data page in the vaulted memory, wherein the open data page comprises a first table of contents (TOC) bit and a first physical address;

write a table of contents entry (TE) for the frag to an open TOC page in the vaulted memory, wherein the open TOC page comprises a second TOC bit and a second physical address;

make a first determination that the open data page is full;

based on the first determination, write the frag to a page in the solid state memory module, wherein the page is associated with the first physical address,

wherein the solid state memory module is flash memory.

7. The storage module of claim 6, wherein the storage module controller is further programmed to:

write a first tag to the open data page prior to writing the TE to the open TOC page, wherein a second tag in the open TOC page comprises the second TOC bit and the second physical address.

8. The storage module of claim 6, wherein the first physical address and the second physical address are located are associated with the same block in the solid state memory module.

9. The storage module of claim 6, wherein the storage module controller is further programmed to:

make a second determination that the open TOC page is full;

based on the second determination, replace the second physical address with a third physical address;

write the TE to a second page in the solid state memory module, wherein the second page is associated with the third physical address.

10. The storage module of claim 9, wherein the first physical address and the third physical address are located are associated with the same block in the solid state memory module.

11. The storage module of claim 6, wherein the vaulted memory is a partition of the memory.

12. The storage module of claim 11, wherein the memory further comprises a cache, wherein the cache is a second partition of the memory.

13. A non-transitory computer readable medium for storing data comprising computer readable program code for:

writing a frag to an open data page in vaulted memory, wherein the open data page comprises a first table of contents (TOC) bit and a first physical address;

writing a table of contents entry (TE) for the frag to an open TOC page in the vaulted memory, wherein the open TOC page comprises a second TOC bit and a second physical address;

making a first determination that the open data page is full;

based on the first determination, writing the frag to a page in a solid state memory module, wherein the page is associated with the first physical address,

wherein the solid state memory module and the vaulted memory are located in a storage module,

wherein the solid state memory module is flash memory.

14. The non-transitory computer readable medium of claim 13, wherein the method further comprises:

writing a first tag to the open data page prior to writing the TE to the open TOC page, wherein a second tag in the open TOC page comprises the second TOC bit and the second physical address.

15. The non-transitory computer readable medium of claim 13, wherein the first physical address and the second physical address are located are associated with the same block in the solid state memory module.

16. The non-transitory computer readable medium of claim 13, wherein the method further comprises:

making a second determination that the open TOC page is full;

based on the second determination, replacing the second physical address with a third physical address;

writing the TE to a second page in the solid state memory module, wherein the second page is associated with the third physical address.

17. The non-transitory computer readable medium of claim 16, wherein the first physical address and the third physical address are located are associated with the same block in the solid state memory module.