Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
First Claim
1. A package structure, comprising:
- a photonics package comprising;
a first integrated circuit chip comprising an insulating layer, an active silicon layer disposed adjacent to the insulating layer, and a BEOL (back-end-of-line) structure disposed on the active silicon layer;
an integrated optical waveguide structure patterned from the active silicon layer of the first integrated circuit chip;
a capping layer disposed on the insulating layer of the first integrated circuit chip, wherein the capping layer comprises an etched opening which exposes a portion of the insulating layer of the first integrated circuit chip and which is aligned to a portion of the integrated optical waveguide structure;
an optoelectronics device disposed within the etched opening of the capping layer and mounted on the portion of the insulating layer of the first integrated circuit chip exposed by the etched opening of the capping layer and in alignment with said portion of the integrated optical waveguide structure; and
an interposer bonded to the BEOL structure of the first integrated circuit chip, the interposer comprising at least one substrate having a plurality of conductive through vias and wiring to provide electrical connections to the BEOL structure.
1 Assignment
0 Petitions
Accused Products
Abstract
Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
-
Citations
19 Claims
-
1. A package structure, comprising:
a photonics package comprising; a first integrated circuit chip comprising an insulating layer, an active silicon layer disposed adjacent to the insulating layer, and a BEOL (back-end-of-line) structure disposed on the active silicon layer; an integrated optical waveguide structure patterned from the active silicon layer of the first integrated circuit chip; a capping layer disposed on the insulating layer of the first integrated circuit chip, wherein the capping layer comprises an etched opening which exposes a portion of the insulating layer of the first integrated circuit chip and which is aligned to a portion of the integrated optical waveguide structure; an optoelectronics device disposed within the etched opening of the capping layer and mounted on the portion of the insulating layer of the first integrated circuit chip exposed by the etched opening of the capping layer and in alignment with said portion of the integrated optical waveguide structure; and an interposer bonded to the BEOL structure of the first integrated circuit chip, the interposer comprising at least one substrate having a plurality of conductive through vias and wiring to provide electrical connections to the BEOL structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
Specification