Semiconductor device including a multigate transistor formed with fin structure

• US 10,229,908 B2
• Filed: 09/19/2017
• Issued: 03/12/2019
• Est. Priority Date: 05/24/2017
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Sung Min, Kim, Dong Won, Bae, Geum Jong
• Primary Examiner(s): Ha, Nathan W
• Application Number:
  US15/709,023
• Publication Number:
  US 20180342508A1
• Time in Patent Office: 539 Days
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/3086 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 27/0886 including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/6656 using multiple spacer layers, e.g. multiple sidewall spacers

Abstract

A semiconductor device is provided. The semiconductor device includes a substrate, a plurality of fins comprising a first fin, a second fin, a third fin, a fourth fin and a fifth fin, each of the plurality of protruding from the substrate in a first direction, and spaced apart from one another in a second direction that intersects the first direction and a plurality of trenches comprising a first trench, a second trench, a third trench and a fourth trench, each of the plurality of trenches being formed between adjacent fins of the plurality of fins, wherein variation of a first width of the first trench and a third width of the third trench is smaller than a first variation, wherein variation of a second width of the second trench and a fourth width of the fourth trench is smaller than a second variation, and wherein the second variation is greater than the first variation.

Claims

1. A semiconductor device, comprising:

a substrate;

a plurality of fins comprising a first fin, a second fin, a third fin, a fourth fin and a fifth fin, each of the plurality of fins protruding from the substrate in a first direction, and spaced apart from one another in a second direction that intersects the first direction; and

a plurality of trenches comprising a first trench, a second trench, a third trench and a fourth trench, each of the plurality of trenches being formed between adjacent fins of the plurality of fins,

wherein variation of a first width of the first trench and a third width of the third trench is smaller than a first variation and variation of a second width of the second trench and a fourth width of the fourth trench is smaller than a second variation,

wherein the second variation is greater than the first variation, and

wherein variation of a first depth of the first trench and a third depth of the third trench is smaller than a third variation, and variation of a second depth of the second trench and a fourth depth of the fourth trench is smaller than a fourth variation, and

wherein the fourth variation is greater than the third variation.

2. The semiconductor device of claim 1, wherein the first width and the third width are smaller than the second width and the fourth width.

3. The semiconductor device of claim 2, wherein the first depth and the third depth are smaller than the second depth and the fourth depth.

4. The semiconductor device of claim 2, wherein a first sidewall slope of the first trench and a third sidewall slope of the third trench are greater than a second sidewall slope of the second trench and a fourth sidewall slope of the fourth trench.

5. The semiconductor device of claim 1, wherein variation between a first sidewall slope of the first trench and a third sidewall slope of the third trench is smaller than a fifth variation,

wherein variation between a second sidewall slope of the second trench and a fourth sidewall slope of the fourth trench is smaller than a sixth variation, and

wherein the sixth variation is greater than the fifth variation.

6. The semiconductor device of claim 1, further comprising a gate electrode extending on the first to fifth fins in the second direction.

7. The semiconductor device of claim 1, wherein a height of at least one of the second, third, and fifth fins is lower than that of the first fin.

8. A semiconductor device, comprising:

a substrate;

a first fin structure, a second fin structure, and a third fin structure protruding from the substrate in a first direction, and spaced apart from each other in a second direction that intersects the first direction;

a first trench to space the first fin structure and the second fin structure apart from each other; and

a fourth trench to space the second fin structure and the third fin structure apart from each other,

wherein the first fin structure comprises a first base fin protruding from the substrate, a first fin and a second fin protruding from the first base fin and spaced apart from each other in the second direction, and a second trench to space the first fin and the second fin apart from each other,

wherein the second fin structure comprises a second base fin protruding from the substrate, a third fin and a fourth fin protruding from the second base fin and spaced apart from each other in the second direction, and a third trench to space the third fin and the fourth fin apart from each other,

wherein variation of a first depth of the first trench and a fourth depth of the fourth trench is smaller than a first variation, and variation of a second depth of the second trench and a third depth of the third trench is smaller than a second variation, and

wherein the first variation is greater than the second variation.

9. The semiconductor device of claim 8, wherein a third height of the third fin and a fourth height of the fourth fin are lower than a first height of the first fin and a second height of the second fin.

10. The semiconductor device of claim 9, wherein the third height of the third fin and the fourth height of the fourth fin are same as each other.

11. The semiconductor device of claim 8, wherein the second base fin has a flat upper surface.

12. The semiconductor device of claim 11, wherein the flat upper surface of the second base fin is lower than a bottom surface of the first trench.

13. The semiconductor device of claim 8, further comprising a base protruding from the substrate and having the first fin structure, the second fin structure and the first trench formed on an upper surface thereof.

14. A semiconductor device, comprising:

a substrate;

a first fin structure, a second fin structure, and a third fin structure protruding from the substrate and extending in a first direction, and spaced apart from each other in a second direction that intersects the first direction;

a first trench to space the first fin structure and the second fin structure apart from each other; and

a fourth trench to space the second fin structure and the third fin structure apart from each other,

wherein the first fin structure comprises a first base fin protruding from the substrate, a first fin and a second fin protruding from the first base fin and spaced apart from each other in the second direction, and a second trench to space the first fin and the second fin apart from each other,

wherein the second fin structure comprises a second base fin protruding from the substrate, a third fin protruding from the second base fin, and a third trench to define the third fin from the second trench,

wherein the third trench is formed on the second base fin,

wherein variation of a first depth of the first trench and a fourth depth of the fourth trench is smaller than a first variation, and variation of a second depth of the second trench and a third depth of the third trench is smaller than a second variation, and

wherein the first variation is greater than the second variation.

15. The semiconductor device of claim 14, wherein the second fin structure further comprises a fourth fin spaced apart from the third fin on the second base fin in the second direction.

16. The semiconductor device of claim 15, wherein a height of the fourth fin is lower than that of the third fin.

17. The semiconductor device of claim 14, wherein the second base fin further comprises a recess formed on an upper surface of the second base fin,

wherein the third trench is positioned between the recess and the third fin, and

wherein a bottom surface of the recess is lower than the third trench.

18. The semiconductor device of claim 14, further comprising a base protruding from the substrate and having the first fin structure and the second fin structure and the first trench formed on an upper surface thereof, and a first deep trench and a second deep trench to define the base on both sides of the base,

wherein the first fin structure is positioned between the first trench and the second deep trench.

19. The semiconductor device of claim 18, wherein the first deep trench is in contact with a second side surface of the second base fin and a third side surface of the third trench.