High efficiency voltage mode class D topology

• US 10,230,341 B2
• Filed: 01/08/2018
• Issued: 03/12/2019
• Est. Priority Date: 09/10/2013
• Status: Active Grant

• Current Assignee: Efficient Power Conversion Corporation
• Original Assignee: Efficient Power Conversion Corporation
• Inventors: de Rooij, Michael A., Strydom, Johan T., Nair, Bhaskaran R.
• Primary Examiner(s): Fureman, Jared
• Assistant Examiner(s): Barnett, Joel
• Application Number:
  US15/864,814
• Publication Number:
  US 20180131335A1
• Time in Patent Office: 428 Days
• Field of Search: None
• CPC Class Codes: H02J 50/12 of the resonant type
• CPC Class Codes: H03F 1/565 using inductive elements
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/541 Transformer coupled at the output of an amplifier
• CPC Class Codes: H03F 3/2171 with field-effect devices H03F3/2173 - H03F3/2178 take precedence
• CPC Class Codes: H03F 3/2173 of the bridge type

Abstract

A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance C_OSS of the pair of transistors and a capacitor the provides DC blocking.

Claims

1. A voltage mode class D power amplifier comprising:

a first pair of N-GaN transistors connected in series between a voltage source and a ground connection, the first pair of N-GaN transistors comprising an upper first pair N-GaN transistor and a lower first pair N-GaN transistor, the upper and lower first pair N-GaN transistors each having a gate, a source and a drain, the drain of the lower first pair N-GaN transistor being connected to the source of the upper first pair N-GaN transistor, and the gates of the upper and lower first pair N-GaN transistors coupled to a control circuit to alternatively turn on and turn off the upper and lower first pair N-GaN transistors;

a second pair of N-GaN transistors connected in series between a voltage source and a ground connection, the second pair of N-GaN transistors comprising an upper second pair N-GaN transistor and a lower second pair N-GaN transistor, the upper and lower second pair N-GaN transistors each having a gate, a source and a drain, the drain of the lower second pair N-GaN transistor being connected to the source of the upper second pair N-GaN transistor, and the gates of the upper and lower second pair N-GaN transistors coupled to the control circuit to alternatively turn on and turn off the upper and lower second pair N-GaN transistors;

a first switch node disposed between a source of a first N-GaN transistor of the first pair of transistors and a drain of a second N-GaN transistor of the first pair of N-GaN transistors;

a second switch node disposed between a source of a first N-GaN transistor of the second pair of transistors and a drain of a second N-GaN transistor of the second pair of N-GaN transistors;

a tank circuit comprising an inductor connected between the first switch node and the second switch node, and a capacitor forming a series resonant circuit with a load to be driven, the tank circuit enabling the power amplifier to operate as a no-load buck converter with zero voltage switching.

2. A voltage mode class D power amplifier comprising:

a first pair of transistors connected in series between a voltage source and a ground connection;

a switch node disposed between a source of a first transistor of the first pair of transistors and a drain of a second transistor of the first pair of transistors;

a non-resonant tank circuit connected between the switch node and the ground connection or the voltage source or both, the tank circuit including a first inductor with an inductance that absorbs an output capacitance of the pair of transistors, and a second pair of transistors connected in series between a voltage source and a ground connection;

a first switch node disposed between a source of a first transistor of the first pair of transistors and a drain of a second transistor of the first pair of transistors;

a second switch node disposed between a source of a first transistor of the second pair of transistors and a drain of a second transistor of the second pair of transistors;

wherein the first inductor is connected between the first switch node and the second switch node; and

a resonant tuning circuit comprising a capacitor and a second inductor connected to a load in series and coupled to either the first or the second switch node;

wherein the tank circuit enables the power amplifier to operate as a no load buck converter with zero voltage switching; and

wherein the power amplifier is configured to self-commutate the first switch node with a necessary dead-time between gate signals applied to the first pair of transistors.

3. The power amplifier of claim 2, wherein the resonant tuning circuit is coupled in series with the load and between the first switch node and a ground connection.

4. The power amplifier of claim 2, wherein the first inductor and the second pair of transistors form a tank circuit.

5. The power amplifier of claim 2, wherein the capacitor and the load are coupled in parallel to the first inductor.

6. The power amplifier of claim 2, wherein the first pair of transistors form a half bridge voltage inverter and the load is coupled to the half bridge voltage inverter.

7. A power amplifier as recited in claim 2, wherein each of the transistors is a GaN transistor.