Vertical sense devices in vertical trench MOSFET

• US 10,234,486 B2
• Filed: 08/19/2015
• Issued: 03/19/2019
• Est. Priority Date: 08/19/2014
• Status: Active Grant

• Current Assignee: Vishay Siliconix
• Original Assignee: Vishay/Siliconix
• Inventors: Shibib, M. Ayman, Zhang, Wenjie
• Primary Examiner(s): Abdelaziez, Yasser A
• Application Number:
  US14/830,324
• Publication Number:
  US 20160056138A1
• Time in Patent Office: 1,308 Days
• Field of Search: 257 48
• CPC Class Codes: G01R 19/0092 measuring current only all subgroups of G01R19/00 take precedence
• CPC Class Codes: G01R 19/15 Indicating the presence of current
• CPC Class Codes: H01L 21/02129 the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/28035 the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities H01L21/28105 takes precedence
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 21/308 using masks H01L21/3063, H01L21/3065 take precedence
• CPC Class Codes: H01L 21/32133 by chemical means only
• CPC Class Codes: H01L 21/823487 with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface with a current flow parallel to the substrate surface H01L21/823431
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0727 in combination with diodes, or capacitors or resistors
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/42372 characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out H01L29/42324 takes precedence
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7815 : with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell

Abstract

Vertical sense devices in vertical trench MOSFET. In accordance with an embodiment of the present invention, an electronic circuit includes a vertical trench metal oxide semiconductor field effect transistor configured for switching currents of at least one amp and a current sensing field effect transistor configured to provide an indication of drain to source current of the MOSFET. A current sense ratio of the current sensing FET is at least 15 thousand and may be greater than 29 thousand.

Claims

1. An electronic circuit comprising:

a split gate vertical trench metal oxide semiconductor field effect transistor (MOSFET) configured for controlling currents of at least one amp;

a current sensing FET configured to provide an electrical signal as an indication of drain to source current of said MOSFET;

a plurality of isolation trenches that are not parallel to gate trenches of said MOSFET,

wherein said plurality of isolation trenches are configured to isolate said MOSFET from said current sensing FET, and

wherein a current sense ratio of said current sensing FET is greater than 15 thousand.

2. The electronic circuit of claim 1 wherein said current sense ratio of said current sensing FET is greater than twenty thousand.

3. The electronic circuit of claim 1 wherein said current sense ratio of said current sensing FET is greater than twenty-nine thousand.

4. The electronic circuit of claim 1 wherein said sense-FET is disposed within said MOSFET.

5. The electronic circuit of claim 1 wherein said sense-FET physically shares trenches with said MOSFET.

6. The electronic circuit of claim 1 wherein said MOSFET comprises a plurality of trench and wherein each said trench comprises at least two electrodes electrically isolated from one another.

7. The electronic circuit of claim 1 wherein a gate and drain of said MOSFET are electrically coupled to a gate and a drain of said current sensing FET.

8. The electronic circuit of claim 1 wherein said isolation trenches form an angle of 40 to 90 degrees to said gate trenches of said MOSFET.

9. The electronic circuit of claim 1 further comprising a surface isolation region between said MOSFET and said current sensing FET, wherein semiconducting materials of a source conduction type of said MOSFET in the mesas of said surface isolation region are left floating.

10. The electronic circuit of claim 8 wherein said surface isolation region is further covered with an insulator.

11. The electronic circuit of claim 8 wherein said surface isolation region is characterized as having a “

U”

shape.

12. The electronic circuit of claim 1 wherein one side of said current sensing FET is free of said MOSFET.

13. An electronic circuit comprising:

a split gate vertical trench metal oxide semiconductor field effect transistor (MOSFET) configured for controlling currents of at least one amp;

a split gate current sensing FET configured to provide an electrical signal as an indication of drain to source current of said MOSFET,

a plurality of isolation trenches that are not parallel to gate trenches of said MOSFET,

wherein said plurality of isolation trenches are configured to isolate said MOSFET from said current sensing FET, and

wherein said plurality of isolation trenches are formed to about the same depth as said gate trenches, and

wherein a current sense ratio of said current sensing FET is greater than 16 thousand.

14. The electronic circuit of claim 13 wherein said isolation trenches establish a physical barrier between a source region of said MOSFET and a source region of said current sensing FET.

15. The electronic circuit of claim 13 wherein a body to epi junction is at the same depth in both said MOSFET and in said current sensing FET.

16. The electronic circuit of claim 13 wherein at least one trench comprises a first gate of said MOSFET and a second gate of said current sensing FET,

wherein said first gate and said second gate are physically separate.

17. The electronic circuit of claim 13 wherein said current sense ratio varies by not more than +/−

0.33 percent across a range of Ids of said MOSFET from 2 amps to 50 amps.