Stepped optical bridge for connecting semiconductor waveguides

• US 10,234,626 B2
• Filed: 02/07/2017
• Issued: 03/19/2019
• Est. Priority Date: 02/08/2016
• Status: Active Grant

• Current Assignee: Skorpios Technologies Inc.
• Original Assignee: Skorpios Technologies Inc.
• Inventors: Lambert, Damien
• Primary Examiner(s): Radkowski, Peter
• Application Number:
  US15/426,366
• Publication Number:
  US 20170227709A1
• Time in Patent Office: 770 Days
• CPC Class Codes: G02B 2006/12061 Silicon
• CPC Class Codes: G02B 2006/12104 Mirror; Reflectors or the like
• CPC Class Codes: G02B 2006/12121 Laser
• CPC Class Codes: G02B 2006/12142 Modulator
• CPC Class Codes: G02B 2006/12147 Coupler
• CPC Class Codes: G02B 6/12002 Three-dimensional structures
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02B 6/12007 forming wavelength selective elements, e.g. multiplexer, demultiplexer
• CPC Class Codes: G02B 6/122 Basic optical elements, e.g. light-guiding paths
• CPC Class Codes: G02B 6/136 by etching
• CPC Class Codes: H01S 5/0202 Cleaving
• CPC Class Codes: H01S 5/021 Silicon based substrates
• CPC Class Codes: H01S 5/02326 Arrangements for relative positioning of laser diodes and optical components, e.g. grooves in the mount to fix optical fibres or lenses
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/028 Coatings ; Treatment of the laser facets, e.g. etching, passivation layers or reflecting layers
• CPC Class Codes: H01S 5/22 having a ridge or stripe structure
• CPC Class Codes: H01S 5/3013 AIIIBV compounds
• CPC Class Codes: H01S 5/343 in AIIIBV compounds, e.g. AlGaAs-laser , InP-based laser
• CPC Class Codes: H01S 5/4025 Array arrangements, e.g. constituted by discrete laser diodes or laser bar H01S5/42 takes precedence
• CPC Class Codes: H01S 5/4087 emitting more than one wavelength
• CPC Class Codes: H04B 10/505 : using external modulation
• CPC Class Codes: H04J 14/02 : Wavelength-division multiplex systems

Abstract

A photonic device includes a semiconductor wafer having a waveguide formed therein. An end of the waveguide includes a step. The photonic device further includes a semiconductor chip bonded to the semiconductor wafer and having an active region, and a waveguide coupler disposed in a gap between a sidewall of the semiconductor chip and the end of the waveguide. The waveguide coupler includes an optical bridge that has a first end and a second end opposing the first end. The first end of the optical bridge is interfaced with a facet of the active region of the semiconductor chip. The second end of the optical bridge is interfaced with the end of waveguide, and has a portion thereof disposed over the step at the end of the waveguide.

Claims

1. A photonic device comprising:

a semiconductor wafer comprising;

a base layer;

a first insulating layer disposed over a surface of the base layer;

a device layer disposed over the first insulating layer; and

a waveguide formed in the device layer;

wherein the semiconductor wafer comprises walls defining a recess in the device layer and the first insulating layer, the recess exposing a portion of the surface of the base layer and an end of the waveguide; and

wherein the end of the waveguide comprises a first step having a first length and a first height, the first height being less than a thickness of the waveguide;

a semiconductor chip bonded to the surface of the base layer of the semiconductor wafer, wherein;

the semiconductor chip comprises an active region;

a facet of the active region is exposed at a sidewall of the semiconductor chip; and

there is a gap between the sidewall of the semiconductor chip and one of the walls of the semiconductor wafer defining the recess; and

a waveguide coupler disposed in the gap, the waveguide coupler comprising;

a second insulating layer disposed over the surface of the base layer of the semiconductor wafer; and

an optical bridge disposed over the second insulating layer, wherein;

the optical bridge has a first end and a second end opposing the first end;

the first end of the optical bridge is interfaced with the facet of the active region; and

the second end of the optical bridge has a second step having a second length and a second height, the second height being less than a thickness of the optical bridge, and the second step is disposed over the first step of the waveguide.

2. The photonic device of claim 1, wherein the first height of the first step ranges from about 5% to about 95% of the thickness of the waveguide.

3. The photonic device of claim 2, wherein the first height of the first step ranges from about 10% to about 85%, or from about 20% to about 75%, or from about 30% to about 65%, or from about 40% to about 55%, of the thickness of the waveguide.

4. The photonic device of claim 1, wherein the first length of the first step ranges from about 0.1 μ

m to about 50 μ

m.

5. The photonic device of claim 4, wherein the first length of the first step ranges from about 0.5 μ

m to about 50 μ

m, or from about 1 μ

m to about 50 μ

m, or from about 5 μ

m to about 50 μ

m.

6. The photonic device of claim 1, wherein the base layer of the semiconductor wafer comprises silicon.

7. The photonic device of claim 6, wherein the semiconductor chip comprises a III-V material.

8. The photonic device of claim 7, wherein the active region comprises a multiple-quantum-well (MQW) structure.

9. The photonic device of claim 1, further comprising:

a third insulating layer disposed over the waveguide.

10. The photonic device of claim 9, wherein:

the base layer of the semiconductor wafer comprises silicon;

the waveguide comprises crystalline silicon; and

the first insulating layer, the second insulating layer, and the third insulating layer comprise silicon oxide.

11. The photonic device of claim 10, wherein the optical bridge comprises amorphous silicon.

12. The photonic device of claim 1, wherein the waveguide has a first refractive index, and the optical bridge has a second refractive index different from the first refractive index.

13. A method for fabricating a photonic device, the method comprising:

providing a semiconductor wafer, the semiconductor wafer comprising;

a base layer;

a first insulating layer disposed over a surface of the base layer;

a device layer disposed over the first insulating layer; and

a waveguide formed in the device layer;

performing etching to form a recess in the device layer and the first insulating layer, wherein;

the recess exposes a portion of the surface of the base layer; and

the recess has a sidewall exposing an end of the waveguide;

bonding a semiconductor chip to the exposed portion of the surface of the base layer, wherein;

the semiconductor chip comprises an active region;

a facet of the active region is exposed at a sidewall of the semiconductor chip; and

there is a gap between the sidewall of the semiconductor chip and the sidewall of the recess;

forming a second insulating layer in the gap;

performing etching to remove a portion of the waveguide to form a first step at the end of the waveguide; and

forming an optical bridge over the second insulating layer, wherein;

the optical bridge has a first end and a second end opposing the first end;

the first end of the optical bridge is interfaced with the facet of the active region; and

the second end of the optical bridge has a second step disposed over the first step at the end of the waveguide.

14. The method of claim 13, wherein the first step has a height ranging from about 5% to about 95% of the thickness of the waveguide.

15. The method of claim 14, wherein the first step has a height ranging from about 10% to about 85%, or from about 20% to about 75%, or from about 30% to about 65%, or from about 40% to about 55%, of the thickness of the waveguide.

16. The method of claim 13, wherein the first step has a length ranging from about 0.1 μ

m to about 50 μ

m.

17. The method of claim 16, wherein the first step has a length ranging from about 0.5 μ

m to about 50 μ

m, or from about 1 μ

m to about 50 μ

m, or from about 5 μ

m to about 50 μ

m.

18. The method of claim 13, wherein the base layer of the semiconductor wafer comprises silicon.

19. The method of claim 18, wherein the semiconductor chip comprises a III-V material.

20. The method of claim 19, wherein the active region comprises a multiple-quantum-well (MQW) structure.