Accessory-based power distribution

• US 10,234,919 B2
• Filed: 09/21/2015
• Issued: 03/19/2019
• Est. Priority Date: 09/21/2015
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Inventors: Daly, Gregory M.
• Primary Examiner(s): Barnes-Bullock, Crystal J
• Application Number:
  US14/860,393
• Publication Number:
  US 20170085084A1
• Time in Patent Office: 1,275 Days
• CPC Class Codes: G05B 15/02 electric
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: G06F 1/3215 Monitoring of peripheral devices
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: H02J 3/00 Circuit arrangements for ac mains or ac distribution networks
• CPC Class Codes: H02J 7/00 Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• CPC Class Codes: H04N 21/4436 Power management, e.g. shutting down unused components of the receiver power management in computer systems G06F1/3203; hibernate or awake process in computer systems G06F9/4418
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Accessory-based power distribution techniques are described. In one or more implementations, power available from a power system of a computing device is intelligently and adaptively distributed between device systems and accessories in accordance with a current usage scenario. To do so, a power manager operates to collect information regarding the current usage scenario, including system state information and a power draw level for accessory devices. Power available from the power system is then divided between the device systems and accessories in dependence upon the usage scenario, such as by establishing and applying power limits dynamically based on the usage scenario. For instance, as system power level for device subsystems may be reduced to provide more power for accessories in some scenarios. Likewise, power for accessories may be limited to enable a high performance mode for device operations in scenarios in which the system is operating near applied limits.

Claims

1. A method implemented by a computing device, the method comprising:

determining a usage scenario for power management of the computing device that reflects at least system state information and a power draw level for one or more detachable accessory devices connected to one or more ports of the computing device; and

controlling distribution of power available from a power system of the computing device between device systems of the computing device and the one or more detachable accessory devices according to the usage scenario, the distribution of power being controlled by, in at least one instance, limiting current supplied from the power system to an individual port of the computing device.

2. A method as described in claim 1, wherein the power system is designed to supply up to a predefined power level and the controlling distribution comprises establishing and applying power limits for the device systems and the one or more detachable accessory devices that total the predefined power level and are different for different usage scenarios.

3. A method as described in claim 1, wherein the controlling distribution includes reducing power that is available to the device systems to provide additional power to the one or more ports.

4. A method as described in claim 1, wherein the device systems of the computing device comprise at least a processing system.

5. A method as described in claim 4, wherein the controlling distribution includes causing a change in operational modes for the processing system between a high performance mode and a power conservation mode.

6. A method as described in claim 5, wherein the processing system comprises a system-on-chip (SOC).

7. A method as described in claim 1, wherein the system state information includes thermal conditions, processing system mode, and power usage history data indicative of expected power usage by the device systems.

8. A method as described in claim 1, wherein the determining the usage scenario comprises establishing priorities for the one or more detachable accessory devices with respect to power distribution, wherein:

different classes of detachable accessory devices are associated with different priorities with respect to power draw; and

the controlling distribution of power comprises using the priorities to determine whether to limit power supplied to the device systems and establish how much of the available power to supply to the one or more detachable accessory devices via the one or more ports.

9. A method as described in claim 1, wherein the controlling distribution of power comprises configuring a current limiting diode, transistor, or integrated circuit to reduce power supplied to the one or more ports in at least one instance and to reduce power supplied to the device systems in at least one other instance.

10. A method as described in claim 1, wherein the one or more detachable accessory devices comprise universal serial bus (USB) devices connectable to the computing device and power system, and the one or more ports comprise one or more USB ports.

11. A computing device comprising:

a processing system and one or more ports for connecting one or more detachable accessory devices, the processing system and the one or more ports being connected to a power system configured to provide power for operation of the processing system and the one or more detachable accessory devices connected to the computing device via the one or more ports;

a power limiter component operable to selectively apply power limits to control amounts of power from the power system supplied to the processing system and the one or more ports; and

a power manager operable to perform operations to cause distribution of power via the power limiter component, the operations including;

obtaining information indicative of a power draw level for the one or more detachable accessory devices connected to the one or more ports;

collecting system state information indicative of expected power usage by the processing system;

establishing power limits for the processing system and the one or more ports based at least upon the power draw level and the expected power usage; and

directing operation of the power limiter component to apply the power limits to divide power available from the power system between the processing system and the one or more ports.

12. A computing device as described in claim 11, wherein the processing system comprises a system-on-chip (SOC).

13. A computing device as described in claim 11, wherein the one or more ports comprise one or more universal serial bus (USB) ports for connection of USB compatible devices.

14. A computing device as described in claim 11, wherein:

the power manager is further operable to identify different classes of detachable accessories connected to the one or more ports;

different classes of detachable accessory devices are associated with different priorities with respect to power draw; and

the establishing the power limits comprises setting the power limits to restrict power supplied to the processing system in order to supply more power to the one or more ports responsive to identifying at least one detachable accessory device associated with priority of a designated level connected via the one or more ports.

15. A computing device as described in claim 11, further comprising a system power bus to which the processing system is connected and an accessory power bus to deliver power to the one or more ports, wherein the power limiter component is configured to divide power available from the power system between the system power bus and the accessory power bus.

16. A computing device as described in claim 11, wherein the power limiter component comprises one or more current limiting components configured to physically limit current supplied to the one or more ports.

17. A computing device comprising:

a system-on-chip (SOC);

one or more ports connectable to one or more detachable accessory devices;

power limiting hardware;

a power system configured to provide power for operation of the SOC and the one or more detachable accessory devices connected to the one or more ports; and

a power manager operable to control distribution of available power from the power system between the SOC and the one or more ports by, in at least one instance, selectively configuring the power limiting hardware to reduce power supplied to the SOC to supply additional power to the one or more ports based at least upon an assessment of a current usage scenario.

18. A computing device as described in claim 17, wherein reducing power supplied to the SOC comprises causing the SOC to switch from a performance mode to a low-power mode to make more power available from the power system for the one or more detachable accessory devices.

19. A computing device as described in claim 17, wherein the power limiting hardware comprises at least one diode, transistor, or current-regulating circuit.

20. A computing device as described in claim 17, wherein the power manager is operable to perform the assessment of the current usage scenario by:

obtaining information indicative of a power draw level requested by the one or more detachable accessory devices connected to the one or more ports;

collecting system state information indicative of expected power usage by the SOC;

identifying priorities with respect to power draw associated with the one or more detachable accessory devices; and

determining when to reduce power available to the SOC based at least upon the power draw level requested, the expected power usage, and the priorities.