Switching initial program load responsibility when components fail

• US 10,241,875 B2
• Filed: 09/15/2016
• Issued: 03/26/2019
• Est. Priority Date: 09/15/2016
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Chowdhary, Manish K., Das, Raja, Gurram, Nagendra K., Kodihalli, Deepak
• Primary Examiner(s): Ehne, Charles
• Application Number:
  US15/266,102
• Publication Number:
  US 20180074921A1
• Time in Patent Office: 922 Days
• CPC Class Codes: G06F 11/0724 in a multiprocessor or a multi-core unit multiprocessors per se G06F15/80
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/1417 Boot up procedures
• CPC Class Codes: G06F 11/20 using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
• CPC Class Codes: G06F 11/203 using migration
• CPC Class Codes: G06F 11/2284 by power-on test, e.g. power-on self test [POST]
• CPC Class Codes: G06F 2201/805 Real-time

Abstract

An approach for at least one service processor to receive a notification of at least one failure during an initial program load of a server and to identify at least one step failing the initial program load. The at least one service processor determines whether a set of conditions are met to switch the initial program load responsibility from a master processor to a service processor. Furthermore, responsive to the at least one service processor determining that the set of one or more conditions are met to switch initial program load responsibility, the at least one service processor assumes the initial program load responsibility.

Claims

1. A method comprising:

receiving, by at least one service processor, a notification of at least one failure during an initial program load of a server;

identifying, by the at least one service processor, at least one step failing the initial program load;

determining, by the at least one service processor, whether a set of conditions are met to switch the initial program load responsibility from a master processor to a service processor, wherein the set of conditions includes;

determining the at least one step failing the initial program load is not an early step in the initial program load, determining the at least one step failing the initial program load is not failing due to a communication issue to a service processor, and determining the at least one step failing the initial program load is not failing due to a bus issue; and

responsive to determining that the set of one or more conditions are met to switch the initial program load responsibility, assuming, by the at least one service processor, the initial program load responsibility.

2. The method of claim 1, further comprising:

executing, by the at least one service processor, one or more corrective actions for one or more failed hardware components in the initial process load with the at least one failure on a node in the server; and

proceeding, by the at least one service processor, with the initial program load of the server.

3. The method of claim 2, wherein executing one or more corrective actions for the one or more failed hardware components further comprises:

marking, by the at least one service processor, the one or more failed hardware components;

stopping, by the at least one service processor, on a temporary basis, initial program load on one or more other processors;

clearing, by the at least one service processor, any fatal errors; and

assuming, by the at least one service processor, ownership of one or more busses.

4. The method of claim 1, wherein assuming responsibility for the initial program load from the master processor further comprises accessing one of a processor NOR flash memory device or processor device persistent storage for information needed for initial program load.

5. The method of claim 1, wherein information accessed for the initial program load includes at least hostboot firmware, a kernel, and a system file.

6. The method of claim 1, wherein receiving the notification of the at least one failure during an initial program load of a server occurs for at least one node of a multi-node server.

7. The method of claim 1, further comprising:

determining, by the at least one service processor, a fail in the at least one node failing initial program load does not occur in one of an early initial program load step or after initializing symmetric multi-processing in the multi-node server;

assuming, by the at least one service processor, responsibility for the at least one node failing initial program load by the service processor in the multi-node server;

halting, by the at least one service processor, initial program load on one or more non-failing nodes in the multi-node server;

bringing, by the at least one service processor, the at least one node failing initial program load to a same initial program load step as each of the one or more non-failing nodes in the multi-node server; and

proceeding, by the at least one service processor, with one or more remaining initial program load steps with each node of the multi-node server.

8. The method of claim 1, wherein receiving a notification of at least one failure during the initial program load of a server comprises:

receiving, by the at least one service processor, a notification of a fail of at least one node in a multi-node server during the initial program load;

determining, by the at least one service processor, that the failure does not occur in one of an early initial program load step or after initializing symmetric multi-processing; and

halting, by the at least one service processor, the initial program load on each non-failing node and assume responsibility for each node of the at least one node with the failure during initial program load.

9. The method of claim 8, further comprising:

determining, by the at least one service processor, that each node of the at least one node with the failure during initial program load is to a same initial program load step as the non-failing nodes;

re-initiating, by the at least one service processor, initial program load on the non-failing nodes and continuing the initial program load to completion for each node of the at least one node with the failure during initial program load.

10. A computer program product comprising:

one or more computer readable storage media and program instructions stored on the one or more computer readable storage media, the program instructions executable by a processor, the program instructions comprising instructions for;

receiving a notification of at least one failure during an initial program load of a server;

identifying at least one step failing the initial program load;

determining whether a set of conditions are met to switch the initial program load responsibility from a master processor to a service processor, wherein the set of conditions includes;

determining the at least one step failing the initial program load is not an early step in the initial program load, determining the at least one step failing the initial program load is not failing due to a communication issue to a service processor, and determining the at least one step failing the initial program load is not failing due to a bus issue; and

responsive to determining that the set of one or more conditions are met to switch the initial program load responsibility, assuming the initial program load responsibility.

11. The computer program product of claim 10, further comprising:

executing one or more corrective actions for one or more failed hardware components in the initial process load with the at least one failure on a node in the server; and

proceeding with the initial program load of the server.

12. The computer program product of claim 11, wherein executing one or more corrective actions for one or more failed hardware components further comprises:

marking the one or more failed hardware components;

stopping on a temporary basis, the initial program load on one or more other processors;

clearing any fatal errors; and

assuming ownership of one or more busses.

13. The computer program product of claim 10, wherein assuming the initial program load responsibility from the master processor further comprises accessing one of a processor NOR flash memory device or processor device persistent storage for information needed for initial program load.

14. The computer program product of claim 10, wherein receiving the notification of the at least one failure during the initial program load of the server further comprises;

receiving notification of the at least one failure of at least one node during the initial program load of a multi-node server;

determining the at least one failure in the at least one node failing initial program load does not occur in one of an early initial program load step or after initializing symmetric multi-processing; and

halting the initial program load on one or more non-failing nodes.

15. The computer program product of claim 14, further comprising:

determining whether the set of conditions are met to switch the initial program load responsibility from a master processor to a service processor in the at least one nodes failing initial program load;

responsive to determining that the set of one or more conditions are met to switch the initial program load responsibility, assuming the initial program load responsibility by the service processor;

bringing the at least one node failing initial program load to a same initial program load step as each of the one or more non-failing nodes;

re-starting the initial program load on the one or more non-failing nodes;

integrating the one or more non-failing nodes and the at least one or more node failing the initial program load; and

proceeding with one or more remaining initial program load steps with each node of the multi-node server.

16. A computer system comprising:

one or more computer processors;

one or more computer readable storage media; and

program instructions stored on the one or more computer readable storage media for execution by at least one of the one or more processors, the program instructions comprising instructions for;

receiving a notification of at least one failure during an initial program load of a server;

identifying at least one step failing the initial program load;

determining whether a set of conditions are met to switch the initial program load responsibility from a master processor to a service processor, wherein the set of conditions includes;

determining the at least one step failing the initial program load is not an early step in the initial program load, determining the at least one step failing the initial program load is not failing due to a communication issue to a service processor, and determining the at least one step failing the initial program load is not failing due to a bus issue; and

responsive to determining that the set of one or more conditions are met to switch the initial program load responsibility, assuming the initial program load responsibility.

17. The computer system of claim 16, further comprising:

executing one or more corrective actions for one or more failed hardware components in the initial process load with the at least one failure on a node in the server;

marking the one or more failed hardware components;

stopping on a temporary basis, the initial program load on one or more other processors;

clearing any fatal errors;

assuming ownership of one or more busses, and

proceeding with the initial program load of the server.

18. The computer system of claim 16, wherein receiving the notification of the at least one failure during the initial program load of the server further comprises;

receiving notification of the at least one failure of at least one node during the initial program load of a multi-node server; and

determining the at least one failure of the at least one node failing initial program load does not occur in one of an early initial program load step or after initializing symmetric multi-processing; and

halting the initial program load on one or more non-failing nodes.

19. The computer system of claim 18, further comprising:

determining whether the set of conditions are met to switch initial program load responsibility from a master processor to a service processor in the one or more failing nodes;

responsive to determining that the set of one or more conditions are met to switch initial program load responsibility, assuming responsibility for the initial program load by the service processor;

bringing the at least one node failing initial program load to a same initial program load step as each of the one or more non-failing nodes;

re-starting the initial program load on the one or more non-failing nodes;

integrating the one or more non-failing nodes and the at least one failing node; and

proceeding with one or more remaining initial program load steps with each node of the multi-node server.