Inductive kickback protection by using multiple parallel circuit breakers with downstream TVS diodes

• US 10,243,348 B2
• Filed: 11/10/2016
• Issued: 03/26/2019
• Est. Priority Date: 11/10/2016
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Fast, Jr., William
• Primary Examiner(s): Patel, Dharti H
• Application Number:
  US15/347,864
• Publication Number:
  US 20180131175A1
• Time in Patent Office: 866 Days
• Field of Search: 361111
• CPC Class Codes: H02H 3/20 responsive to excess voltage
• CPC Class Codes: H02H 9/042 comprising means to limit the absorbed power or indicate damaged over-voltage protection device
• CPC Class Codes: H02H 9/043 Protection of over-voltage protection device by short-circuiting
• CPC Class Codes: H02H 9/044 Physical layout, materials not provided for elsewhere varistors H01C7/12; spark-gaps H01T; Ovshinsky devices H10N70/00

Abstract

Embodiments of the present invention disclose an apparatus including a power source and a plurality of electronic subsystems connected in parallel to the power source. Each of the plurality of electronic sub systems includes a circuit breaker, a transient-voltage-suppression (TVS) diode, and a load. The TVS diode is located downstream of the circuit breaker in each of the plurality of electronic systems.

Claims

1. An apparatus comprising:

a power source; and

a plurality of electronic subsystems connected in parallel to the power source;

wherein each of the plurality of electronic subsystems includes a circuit breaker, a transient-voltage-suppression (TVS) diode, and a load;

wherein the TVS diode is located downstream of the circuit breaker in each of the plurality of electronic subsystems;

wherein when the load of one of the plurality of electronic subsystems fails to a short, the circuit breaker in that subsystem trips causing inductive kickback; and

wherein the inductive kickback is dissipated through at least one of the parallel electronic subsystems.

2. The apparatus of claim 1, wherein the load is located downstream of the circuit breaker in each of the plurality of electronic subsystems.

3. The apparatus of claim 1, wherein the load is located in parallel with the TVS diode in each of the plurality of electronic subsystems.

4. The apparatus of claim 1, wherein the inductive kickback is dissipated through a plurality of the parallel connected electronic systems.

5. The apparatus of claim 1, wherein when a plurality of circuit breakers in multiple of the plurality of electronic system fails an inductive kickback is generated;

wherein the inductive kickback is dissipated through another of the parallel connected electronic systems.

6. An electronic system comprising:

a power source; and

a plurality of subsystems connected in parallel to the power source;

wherein each of the plurality of subsystems includes a circuit breaker, a transient-voltage-suppression (TVS) diode, and a load;

wherein the TVS diode is located downstream of the circuit breaker in each of the plurality of subsystems;

wherein when the load of one of the plurality of electronic subsystems fails to a short, the circuit breaker in that subsystem trips causing inductive kickback; and

wherein the inductive kickback is dissipated through at least one of the parallel electronic subsystems.

7. The electronic system of claim 6, wherein the load is located downstream of the circuit breaker in each of the plurality of subsystems.

8. The electronic system of claim 6, wherein the load is located in parallel with the TVS diode in each of the plurality of subsystems.

9. The electronic system of claim 6, wherein the inductive kickback is dissipated through a plurality of the parallel connected subsystems.

10. The electronic system of claim 6, wherein when load of a plurality of the plurality of electronic subsystems fails to a short, the circuit breaker in each of the subsystem trips causing inductive kickback;

wherein the inductive kickback is dissipated through another of the parallel connected subsystems.

11. A method for managing power surges in an electronic circuit, comprising:

arranging a plurality of electronic subsystems for connection in parallel to a power source, each of the plurality of electronic subsystems includes a circuit breaker, a transient-voltage suppression (TVS) diode, and a load;

locating the TVS diode downstream of the circuit breaker in each of the plurality of electronic subsystems;

wherein when the load of one of the plurality of electronic subsystems fails to a short, the circuit breaker in that subsystem trips causing inductive kickback; and

wherein the inductive kickback is dissipated through at least one of the parallel electronic subsystems.

12. The method of claim 11, wherein the load is located downstream of the circuit breaker in each of the plurality of electronic subsystems.

13. The method of claim 11, wherein the load is located in parallel with the TVS diode in each of the plurality of electronic subsystems.

14. The method of claim 11, wherein the inductive kickback is dissipated through a plurality of the parallel connected electronic systems.

15. The method of claim 11, wherein when a plurality of circuit breakers in multiple of the plurality of electronic system fails an inductive kickback is generated;

wherein the inductive kickback is dissipated through another of the parallel connected electronic systems.