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Hardware percentile latency measurement

  • US 10,243,842 B2
  • Filed: 10/27/2017
  • Issued: 03/26/2019
  • Est. Priority Date: 11/05/2013
  • Status: Active Grant
First Claim
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1. A system, comprising:

  • at least one processor;

    a network interface; and

    memory including instructions that, when executed by the at least one processor, cause the system to perform operations comprising;

    receiving a first set of packets at a network interface including a number of packets with a latency below a current threshold value;

    updating the current threshold value, comprising;

    increasing the current threshold value by LM*((L−

    LF)/G), when LF is less than L;

    decreasing the current threshold value by LM*((LF−

    L)/G), when LF is greater than L;

    wherein;

    LF is a ratio of the number of packets with a latency below a current threshold value to a quantity of the first set of packets;

    L is target ratio representing a latency percentage;

    LM is a maximum latency value; and

    G is a magnitude of adjustment.

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