Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control
First Claim
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1. A method, comprising:
- identifying a first binary executable generated by a source-level complier from a source file;
generating an intermediate object from the first binary executable;
running one or more general analyses on the intermediate object to obtain input information for one or more power-specific analyses, wherein the input information includes disambiguated symbolic information;
updating the intermediate object with the input information for the one or more power-specific analyses;
identifying information relating to micro-operations of components of a microprocessor by running the one or more power-specific analyses on the updated intermediate object;
wherein the one or more power-specific analyses predict inactive periods of resources in the microprocessor using static information produced through a compilation of a computer program;
generating control instructions based on the information relating to the micro-operations of the components of the microprocessor, the control instructions comprising instructions that contain control data that renders unnecessary at least one of the micro-operations, wherein the control instructions are configured to control the resources during the inactive periods so as to reduce energy consumption of the resources during the inactive periods; and
combining the generated control instructions with at least one of instructions of the intermediate object to generate a second binary executable to consume less energy at runtime than the first binary executable.
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Abstract
A method comprising of analyzing and transforming a program executable at compile-time such that a processor design objective is optimized. A method including analyzing an executable to estimate energy consumption of an application component in a processor. A method including transforming an executable to reduce energy consumption in a processor. A processor framework controlled by compiler inserted control that statically exposes parallelism in an instruction sequence. A processor framework to reduce energy consumption in an instruction memory system with compiler inserted control.
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Citations
26 Claims
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1. A method, comprising:
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identifying a first binary executable generated by a source-level complier from a source file; generating an intermediate object from the first binary executable; running one or more general analyses on the intermediate object to obtain input information for one or more power-specific analyses, wherein the input information includes disambiguated symbolic information; updating the intermediate object with the input information for the one or more power-specific analyses; identifying information relating to micro-operations of components of a microprocessor by running the one or more power-specific analyses on the updated intermediate object; wherein the one or more power-specific analyses predict inactive periods of resources in the microprocessor using static information produced through a compilation of a computer program; generating control instructions based on the information relating to the micro-operations of the components of the microprocessor, the control instructions comprising instructions that contain control data that renders unnecessary at least one of the micro-operations, wherein the control instructions are configured to control the resources during the inactive periods so as to reduce energy consumption of the resources during the inactive periods; and combining the generated control instructions with at least one of instructions of the intermediate object to generate a second binary executable to consume less energy at runtime than the first binary executable. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A memory having instructions stored thereon that, in response to execution by a processing, cause the processing to perform operations comprising:
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generating an intermediate object from a first binary executable; running one or more general analyses on the intermediate object to obtain input information for one or more power-specific analyses, wherein the input information includes disambiguated symbolic information; updating the intermediate object with the input information for the one or more power-specific analyses; identifying information relating to micro-operations of components of a microprocessor by running the one or more power-specific analyses on the updated intermediate object, wherein the one or more power-specific analyses predict inactive periods of resources in the microprocessor using static information produced through a compilation of a computer program; generating control instructions based on the information relating to the micro-operations of the components of the microprocessor, the control instructions comprising instructions that contain control data that renders unnecessary at least one of the micro-operations, wherein the control instructions are configured to control the resources during the inactive periods so as to reduce energy consumption of the resources during the inactive periods; and combining the generated control instructions with at least one of instructions of the intermediate object to generate a second binary executable to consume less energy at runtime than the first binary executable. - View Dependent Claims (22, 23, 24, 25, 26)
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Specification