Managing lock and unlock operations using active spinning
First Claim
1. A method for managing instructions on a processor comprising a plurality of processor cores, the method comprising:
- executing a plurality of threads on the processor cores, each thread having access to a stored library of operations including at least one lock operation and at least one unlock operation; and
managing instructions that are issued on a first processor core of the plurality of processor cores, for a first thread executing on the first processor core, the managing including;
for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock, determining if the particular lock has already been acquired for another thread executing on a processor core other than the first processor core, and if the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using a hardware lock operation different from the lock operation in the stored library, and if the particular lock has not already been acquired, acquiring the particular lock for the first thread, wherein the hardware lock operation performs a modified atomic operation that changes a result of the hardware lock operation for failed attempts to acquire the particular lock relative to a result of the lock operation in the stored library, andfor each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock, releasing the particular lock from the first thread.
4 Assignments
0 Petitions
Accused Products
Abstract
Managing instructions on a processor includes: executing threads having access to a stored library of operations. For a first thread executing on the first processor core, for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock, the managing includes determining if the particular lock has already been acquired for another thread executing on a processor core other than the first processor core, and if so, continuing to perform the lock operation for multiple attempts using a hardware lock operation different from the lock operation in the stored library, and if not, acquiring the particular lock for the first thread. The hardware lock operation performs a modified atomic operation that changes a result of the hardware lock operation for failed attempts to acquire the particular lock relative to a result of the lock operation in the stored library.
-
Citations
20 Claims
-
1. A method for managing instructions on a processor comprising a plurality of processor cores, the method comprising:
-
executing a plurality of threads on the processor cores, each thread having access to a stored library of operations including at least one lock operation and at least one unlock operation; and managing instructions that are issued on a first processor core of the plurality of processor cores, for a first thread executing on the first processor core, the managing including; for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock, determining if the particular lock has already been acquired for another thread executing on a processor core other than the first processor core, and if the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using a hardware lock operation different from the lock operation in the stored library, and if the particular lock has not already been acquired, acquiring the particular lock for the first thread, wherein the hardware lock operation performs a modified atomic operation that changes a result of the hardware lock operation for failed attempts to acquire the particular lock relative to a result of the lock operation in the stored library, and for each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock, releasing the particular lock from the first thread. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A processor comprising:
-
a plurality of processor cores, each configured to execute a plurality of threads, each thread having access to a stored library of operations including at least one lock operation and at least one unlock operation; and instruction management circuitry in at least a first processor core of the plurality of processor cores, the instruction management circuitry configured to manage instructions that are issued on the first processor core, for a first thread executing on the first processor core, the managing including; for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock, determining if the particular lock has already been acquired for another thread executing on a processor core other than the first processor core, and if the particular lock has already been acquired, continuing to perform the lock operation for a plurality of attempts using a hardware lock operation different from the lock operation in the stored library, and if the particular lock has not already been acquired, acquiring the particular lock for the first thread, wherein the hardware lock operation performs a modified atomic operation that changes a result of the hardware lock operation for failed attempts to acquire the particular lock relative to a result of the lock operation in the stored library, and for each instruction included in the first thread and identified as being associated with an unlock operation corresponding to a particular lock, releasing the particular lock for the first thread. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
-
Specification