Providing exclusive use of cache associated with a processing entity of a processor complex to a selected task

• US 10,248,457 B2
• Filed: 08/10/2016
• Issued: 04/02/2019
• Est. Priority Date: 08/10/2016
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Borlick, Matthew G., Gupta, Lokesh M., Hardy, Clint A., Nguyen, Trung N.
• Primary Examiner(s): Nguyen, Van H
• Application Number:
  US15/233,276
• Publication Number:
  US 20180046506A1
• Time in Patent Office: 965 Days
• Field of Search: None
• CPC Class Codes: G06F 9/4887 involving deadlines, e.g. rate based, periodic

Abstract

A plurality of processing entities are maintained in a processor complex. In response to determining that a task is a critical task, the critical task is dispatched to a scheduler, wherein it is preferable to prioritize execution of critical tasks over non-critical tasks. In response to dispatching the critical task to the scheduler, the scheduler determines which processing entity of the plurality of processing entities has a least amount of processing remaining to be performed for currently scheduled tasks. Tasks queued on the determined processing entity are moved to other processing entities, and the currently scheduled tasks on the determined processing entity are completed. In response to moving tasks queued on the determined processing entity to other processing entities and completing the currently scheduled tasks on the determined processing entity, the critical task is dispatched on the determined processing entity.

Claims

1. A method, comprising:

maintaining a plurality of processing entities in a processor complex;

in response to determining that a task is a critical task, dispatching the critical task to a scheduler, wherein it is preferable to prioritize execution of critical tasks over non-critical tasks;

in response to dispatching the critical task to the scheduler, determining, by the scheduler, which processing entity of the plurality of processing entities has a least amount of processing remaining to be performed for currently scheduled tasks;

moving tasks queued on the determined processing entity to other processing entities, and completing the currently scheduled tasks on the determined processing entity;

in response to moving tasks queued on the determined processing entity to other processing entities and completing the currently scheduled tasks on the determined processing entity, dispatching the critical task on the determined processing entity, wherein the plurality of processing entities comprise a plurality of cores, and wherein the determined processing entity corresponds to a determined core that has a clean L1 cache and a clean L2 cache at a time at which the critical task is scheduled for execution in the determined core and no other tasks besides the critical task are running on the determined core at the time; and

in response to the critical task being scheduled on the determined core, the critical task secures exclusive access to the L1 cache and L2 cache of the determined core, wherein if data is not found in the L1 cache of the determined core then the data is retrieved from the L2 cache of the determined core, and wherein each core of the plurality of cores have different sets of L1 cache and L2 cache but share a L3 cache.

2. The method of claim 1, the method further comprising:

in response to determining that the task is a non-critical task, scheduling the task for execution in any of the plurality of processing entities.

3. The method of claim 1, wherein the critical task executes faster by using the clean L1 cache and the clean L2 cache of the determined core, in comparison to scheduling the critical task on any other core of the plurality of cores, wherein in the other cores the L1 cache and the L2 cache are shared among a plurality of tasks.

4. The method of claim 1, the method further comprising:

in response to completion of the critical task in the determined processing entity, returning the scheduler to a mode in which the scheduler schedules non-critical tasks for execution on the determined processing entity.

5. A system, comprising:

a memory; and

a processor coupled to the memory, wherein the processor performs operations, the operations comprising;

maintaining a plurality of processing entities in a processor complex;

in response to determining that a task is a critical task, dispatching the critical task to a scheduler, wherein it is preferable to prioritize execution of critical tasks over non-critical tasks;

in response to dispatching the critical task to the scheduler, determining, by the scheduler, which processing entity of the plurality of processing entities has a least amount of processing remaining to be performed for currently scheduled tasks;

moving tasks queued on the determined processing entity to other processing entities, and completing the currently scheduled tasks on the determined processing entity;

in response to moving tasks queued on the determined processing entity to other processing entities and completing the currently scheduled tasks on the determined processing entity, dispatching the critical task on the determined processing entity, wherein the plurality of processing entities comprise a plurality of cores, and wherein the determined processing entity corresponds to a determined core that has a clean L1 cache and a clean L2 cache at a time at which the critical task is scheduled for execution in the determined core and no other tasks besides the critical task are running on the determined core at the time; and

in response to the critical task being scheduled on the determined core, the critical task secures exclusive access to the L1 cache and L2 cache of the determined core, wherein if data is not found in the L1 cache of the determined core then the data is retrieved from the L2 cache of the determined core, and wherein each core of the plurality of cores have different sets of L1 cache and L2 cache but share a L3 cache.

6. The system of claim 5, the operations further comprising:

in response to determining that the task is a non-critical task, scheduling the task for execution in any of the plurality of processing entities.

7. The system of claim 5, wherein the critical task executes faster by using the clean L1 cache and the clean L2 cache of the determined core, in comparison to scheduling the critical task on any other core of the plurality of cores, wherein in the other cores the L1 cache and the L2 cache are shared among a plurality of tasks.

8. The system of claim 5, the operations further comprising:

in response to completion of the critical task in the determined processing entity, returning the scheduler to a mode in which the scheduler schedules non-critical tasks for execution on the determined processing entity.

9. A computer program product, the computer program product comprising a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code configured to perform operations, the operations comprising:

maintaining a plurality of processing entities in a processor complex;

in response to determining that a task is a critical task, dispatching the critical task to a scheduler, wherein it is preferable to prioritize execution of critical tasks over non-critical tasks;

in response to dispatching the critical task to the scheduler, determining, by the scheduler, which processing entity of the plurality of processing entities has a least amount of processing remaining to be performed for currently scheduled tasks;

moving tasks queued on the determined processing entity to other processing entities, and completing the currently scheduled tasks on the determined processing entity;

in response to moving tasks queued on the determined processing entity to other processing entities and completing the currently scheduled tasks on the determined processing entity, dispatching the critical task on the determined processing entity, wherein the plurality of processing entities comprise a plurality of cores, and wherein the determined processing entity corresponds to a determined core that has a clean L1 cache and a clean L2 cache at a time at which the critical task is scheduled for execution in the determined core and no other tasks besides the critical task are running on the determined core at the time; and

in response to the critical task being scheduled on the determined core, the critical task secures exclusive access to the L1 cache and L2 cache of the determined core, wherein if data is not found in the L1 cache of the determined core then the data is retrieved from the L2 cache of the determined core, and wherein each core of the plurality of cores have different sets of L1 cache and L2 cache but share a L3 cache.

10. The computer program product of claim 9, the operations further comprising:

in response to determining that the task is a non-critical task, scheduling the task for execution in any of the plurality of processing entities.

11. The computer program product of claim 9, wherein the critical task executes faster by using the clean L1 cache and the clean L2 cache of the determined core, in comparison to scheduling the critical task on any other core of the plurality of cores, wherein in the other cores the L1 cache and the L2 cache are shared among a plurality of tasks.

12. The computer program product of claim 9, the operations further comprising:

in response to completion of the critical task in the determined processing entity, returning the scheduler to a mode in which the scheduler schedules non-critical tasks for execution on the determined processing entity.

13. A storage system, comprising:

a first server; and

a second server coupled to the first server, wherein the storage system is configurable to perform operations, the operations comprising;

maintaining a plurality of processing entities;

in response to determining that a task is a critical task, dispatching the critical task to a scheduler, wherein it is preferable to prioritize execution of critical tasks over non-critical tasks;

in response to dispatching the critical task to the scheduler, determining, by the scheduler, which processing entity of the plurality of processing entities has a least amount of processing remaining to be performed for currently scheduled tasks;

moving tasks queued on the determined processing entity to other processing entities, and completing the currently scheduled tasks on the determined processing entity;

in response to moving tasks queued on the determined processing entity to other processing entities and completing the currently scheduled tasks on the determined processing entity, dispatching the critical task on the determined processing entity, wherein the plurality of processing entities comprise a plurality of cores, and wherein the determined processing entity corresponds to a determined core that has a clean L1 cache and a clean L2 cache at a time at which the critical task is scheduled for execution in the determined core and no other tasks besides the critical task are running on the determined core at the time; and

in response to the critical task being scheduled on the determined core, the critical task secures exclusive access to the L1 cache and L2 cache of the determined core, wherein if data is not found in the L1 cache of the determined core then the data is retrieved from the L2 cache of the determined core, and wherein each core of the plurality of cores have different sets of L1 cache and L2 cache but share a L3 cache.

14. The storage system of claim 13, the operations further comprising:

in response to completion of the critical task in the determined processing entity, returning the scheduler to a mode in which the scheduler schedules non-critical tasks for execution on the determined processing entity.

15. The storage system of claim 13, the operations further comprising:

in response to determining that the task is a non-critical task, scheduling the task for execution in any of the plurality of processing entities.

16. The storage system of claim 13, wherein the critical task executes faster by using the clean L1 cache and the clean L2 cache of the determined core, in comparison to scheduling the critical task on any other core of the plurality of cores, wherein in the other cores the L1 cache and the L2 cache are shared among a plurality of tasks.

17. A server computational device of a dual-server storage system, the server computational device comprising:

memory; and

a processor coupled to the memory, wherein the processor performs operations, the operations comprising;

maintaining a plurality of processing entities;

in response to determining that a task is a critical task, dispatching the critical task to a scheduler, wherein it is preferable to prioritize execution of critical tasks over non-critical tasks;

in response to dispatching the critical task to the scheduler, determining, by the scheduler, which processing entity of the plurality of processing entities has a least amount of processing remaining to be performed for currently scheduled tasks;

moving tasks queued on the determined processing entity to other processing entities, and completing the currently scheduled tasks on the determined processing entity;

in response to moving tasks queued on the determined processing entity to other processing entities and completing the currently scheduled tasks on the determined processing entity, dispatching the critical task on the determined processing entity, wherein the plurality of processing entities comprise a plurality of cores, and wherein the determined processing entity corresponds to a determined core that has a clean L1 cache and a clean L2 cache at a time at which the critical task is scheduled for execution in the determined core and no other tasks besides the critical task are running on the determined core at the time; and

in response to the critical task being scheduled on the determined core, the critical task secures exclusive access to the L1 cache and L2 cache of the determined core, wherein if data is not found in the L1 cache of the determined core then the data is retrieved from the L2 cache of the determined core, and wherein each core of the plurality of cores have different sets of L1 cache and L2 cache but share a L3 cache.

18. The server computational device of claim 17, the operations further comprising:

in response to completion of the critical task in the determined processing entity, returning the scheduler to a mode in which the scheduler schedules non-critical tasks for execution on the determined processing entity.

19. The server computational device of claim 17, the operations further comprising:

in response to determining that the task is a non-critical task, scheduling the task for execution in any of the plurality of processing entities.

20. The server computational device of claim 17, wherein the critical task executes faster by using the clean L1 cache and the clean L2 cache of the determined core, in comparison to scheduling the critical task on any other core of the plurality of cores, wherein in the other cores the L1 cache and the L2 cache are shared among a plurality of tasks.