Controller of semiconductor memory device for detecting event and storing event information and operating method thereof

• US 10,248,538 B2
• Filed: 08/10/2016
• Issued: 04/02/2019
• Est. Priority Date: 03/15/2016
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: Roh, Young Dong
• Primary Examiner(s): Grullon, Francisco A
• Application Number:
  US15/233,797
• Publication Number:
  US 20170269874A1
• Time in Patent Office: 965 Days
• CPC Class Codes: G06F 11/36 Preventing errors by testing or debugging software
• CPC Class Codes: G06F 11/362 Software debugging

Abstract

There are provided a controller of a semiconductor memory device, which stores data for debug processing, and an operating method of the controller. A controller for controlling a semiconductor memory device includes an event occurrence detection unit configured to detect whether an event occurs, an event information generation unit configured to generate event information in response to the detecting result from the event occurrence detection unit, and a command generation unit configured to generate a command for storing the event information in the semiconductor memory device.

Claims

1. A controller for controlling a semiconductor memory device, the controller comprising:

an event occurrence detection unit configured to detect whether an event occurs;

an event information generation unit configured to generate event information, in response to the detected result; and

a command generation unit configured to generate a command for storing the event information in the semiconductor memory device,

wherein the semiconductor memory device includes a memory cell array configured to perform a program operation of storing data,

wherein the event includes a time-out event that occurs when the program operation is performed in the semiconductor memory device, and is detected when a monitoring signal does not exist for a time-out time and a value of a data length counter is not a predetermined value, and

wherein the monitoring signal periodically inputted for every set time is continuously inputted for the time-out time, and the value of the data length counter is a value for counting data input to the semiconductor memory device.

2. The controller of claim 1, wherein the event occurrence detection unit is configured to detect whether the event occurs by comparing event signals received through a plurality of event signal lines with an event expectation value representing states of the event signals.

3. The controller of claim 2, wherein the event occurrence detection unit includes:

an event occurrence signal table configured to store an event signal expectation value representing the states of the event signals when the event occurs; and

an enable signal generation unit configured to generate an enable signal using the states of the event signals received through the plurality of event signal lines and the event expectation value.

4. The controller of claim 1, wherein the event information generation unit configured to generate the event information on the basis of event data received through event data lines, in response to an enable signal indicating the detected result.

5. The controller of claim 4, wherein the event information generation unit includes:

a counter configured to generate an operation start signal in response to the enable signal, and, if a counter operation time is expired, to generate an operation end signal;

a storage signal generation unit configured to generate a storage signal for storing the event data received through the event data line in response to the operation start signal; and

an event data storage unit configured to store the event data received through the event data lines according to the storage signal.

6. The controller of claim 5, wherein the storage signal generation unit stops the generation of the storage signal in response to the operation end signal.

7. The controller of claim 5, wherein the event data storage unit stores the event data received for a time that is at least two times longer than the counter operation time.

8. The controller of claim 5, wherein the event data storage unit stores the event data using a first in first out (FIFO) method.

9. The controller of claim 1, wherein the event information includes event data from a preset time before and after a point of time when an event occurs.

10. The controller of claim 2, wherein the plurality of event signal lines are coupled to internal signal lines or external signal lines of the controller, respectively.

11. The controller of claim 4, wherein the event data includes information representing states of the internal signal lines or external signal lines of the controller.

12. The controller of claim 1, wherein the command generation unit includes a command storage unit configured to store a plurality of commands to be performed according to the event and the event information.

13. The controller of claim 1, wherein, if the event information is generated, the command generation unit determines whether the controller is in an operable state.

14. The controller of claim 13, wherein, when the controller is not in the operable state, the command generation unit performs a partial reset operation for operating the controller.

15. A method of operating a controller for controlling a semiconductor memory device, the method including:

comparing event signals input through a plurality of event signal lines with an event expectation value representing states of the event signals when an event occurs to detect the occurrence of the event;

generating event information including event data from a preset time before and after a point of time when the event occurs; and

generating a command for storing the event information in the semiconductor memory device,

wherein the semiconductor memory device includes a memory cell array configured to perform a program operation of storing data,

wherein the event includes a time-out event that occurs when the program operation is performed in the semiconductor memory device, and is detected when a monitoring signal does not exist for a time-out time and a value of a data length counter is not a predetermined value, and

wherein the monitoring signal periodically inputted for every set time is continuously inputted for the time-out time, and the value of the data length counter is a value for counting data input to the semiconductor memory device.

16. The method of claim 15, wherein the generating of the event information includes:

if the event occurs, operating a counter for a preset operation time;

storing the event data for the preset operation time; and

generating the event information on the basis of the stored event data.

17. The method of claim 15, wherein the generating of the command includes:

determining whether the event information has been generated;

if the event information is generated, determining whether the controller is in an operable state; and

if the controller is not in the operable state, performing a partial reset operation of the controller.

18. The method of claim 17, further comprising:

if the controller is in the operable state, generating a physical block address at which the event information is to be stored; and

transmitting, to the semiconductor memory device, the command for storing the event information, the physical block address, and the event information.

19. The method of claim 15, wherein the plurality of event signal lines are coupled to internal signal lines or external signal lines of the controller, respectively.

20. The method of claim 15, wherein the event data includes information representing states of the internal signal lines or external signal lines of the controller.