Manufacturing method of semiconductor device

• US 10,249,651 B2
• Filed: 03/05/2018
• Issued: 04/02/2019
• Est. Priority Date: 04/27/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koezuka, Junichi, Yamade, Naoto, Sato, Yuhei, Okazaki, Yutaka, Yamazaki, Shunpei
• Primary Examiner(s): Tobergte, Nicholas J
• Application Number:
  US15/911,708
• Publication Number:
  US 20180261633A1
• Time in Patent Office: 393 Days
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/383 using diffusion into or out of a solid from or into a gaseous phase
• CPC Class Codes: H01L 21/44 Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1274 using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.

Claims

1. A semiconductor device comprising:

an insulating layer;

an oxide semiconductor film including a source region and a drain region over and in contact with the insulating layer;

a gate insulating film over the oxide semiconductor film; and

a gate electrode layer over the gate insulating film,

wherein the source region and the drain region include impurities,

wherein the oxide semiconductor film contains a crystal having a c-axis which is substantially perpendicular to a top surface of the oxide semiconductor film, and

wherein an average surface roughness of a top surface of the insulating layer is greater than or equal to 0.05 nm and less than 0.5 nm.

2. A semiconductor device comprising:

an insulating layer;

an oxide semiconductor film including a source region and a drain region over and in contact with the insulating layer;

a gate insulating film over the oxide semiconductor film; and

a gate electrode layer over the gate insulating film,

wherein the source region and the drain region include impurities,

wherein the oxide semiconductor film contains a crystal having a c-axis which is substantially perpendicular to a top surface of the oxide semiconductor film,

wherein an average surface roughness of a top surface of the insulating layer is greater than or equal to 0.05 nm and less than 0.5 nm, and

wherein the impurities are added into the source region and the drain region through the gate insulating film.

3. A semiconductor device comprising:

an insulating layer;

an oxide semiconductor film including a source region and a drain region over and in contact with the insulating layer;

a gate insulating film over the oxide semiconductor film;

a gate electrode layer over the gate insulating film; and

a protective film over the gate electrode layer,

wherein the source region and the drain region include impurities,

wherein the oxide semiconductor film contains a crystal having a c-axis which is substantially perpendicular to a top surface of the oxide semiconductor film,

wherein an average surface roughness of a top surface of the insulating layer is greater than or equal to 0.05 nm and less than 0.5 nm, and

wherein the impurities are added into the source region and the drain region through the gate insulating film.