Voltage detection circuit
First Claim
1. A voltage detection circuit of a differential configuration for sampling voltages of two input nodes and detecting a differential voltage between sampled voltages, the voltage detection circuit comprising:
- two detection capacitors paired in a differential configuration;
a first detection switch formed of a P-channel type MOS transistor for opening and closing a path between one of the two detection capacitors and one of the two input nodes;
a second detection switch formed of an N-channel type MOS transistor for opening and closing a path between an other of the two capacitors and an other of the two input nodes;
a third detection switch formed of at least one of a P-channel type MOS transistor and an N-channel type MOS transistor for opening and closing a path between the two detection capacitors;
a driving part for driving the first detection switch and the second detection switch complementarily to the third detection switch such that the first detection switch and the second detection switch are turned on and off when the third detection switch is turned off and on, respectively;
a minimum selector for selecting a lower one of the voltages of the two input nodes and applying a selected voltage as a substrate potential of the N-channel type MOS transistor; and
a maximum selector for selecting a higher one of the voltages of the two input nodes and applying a selected voltage as a substrate potential of the P-channel type MOS transistor.
1 Assignment
0 Petitions
Accused Products
Abstract
A voltage detection circuit includes two detection capacitors, which are paired and configured differentially, first to third detection switches, a drive part, a minimum selector and a maximum selector. The first detection switch is formed of a pMOS transistor, which opens and closes a path between one of the detection capacitors and an input node. The second detection switch is formed of an nMOS transistor, which opens and closes a path between the other of the detection capacitors and an input node. The third detection switch is formed of a series circuit of a pMOS transistor and an nMOS transistor, which open and close a path between two detection capacitors. The driving part turns on and off complementarily between the first and second switches and the third detection switch. The minimum selector applies a lower one of voltages of the input nodes as a substrate potential of the nMOS transistor. The maximum selector applies a higher one of the voltages of the input nodes as a substrate potential of the pMOS transistor.
5 Citations
11 Claims
-
1. A voltage detection circuit of a differential configuration for sampling voltages of two input nodes and detecting a differential voltage between sampled voltages, the voltage detection circuit comprising:
-
two detection capacitors paired in a differential configuration; a first detection switch formed of a P-channel type MOS transistor for opening and closing a path between one of the two detection capacitors and one of the two input nodes; a second detection switch formed of an N-channel type MOS transistor for opening and closing a path between an other of the two capacitors and an other of the two input nodes; a third detection switch formed of at least one of a P-channel type MOS transistor and an N-channel type MOS transistor for opening and closing a path between the two detection capacitors; a driving part for driving the first detection switch and the second detection switch complementarily to the third detection switch such that the first detection switch and the second detection switch are turned on and off when the third detection switch is turned off and on, respectively; a minimum selector for selecting a lower one of the voltages of the two input nodes and applying a selected voltage as a substrate potential of the N-channel type MOS transistor; and a maximum selector for selecting a higher one of the voltages of the two input nodes and applying a selected voltage as a substrate potential of the P-channel type MOS transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A voltage detection circuit of a differential configuration for sampling voltages of two input nodes and detecting a differential voltage between sampled voltages, the voltage detection circuit comprising:
-
two detection capacitors paired in a differential configuration; a first detection switch for opening and closing a path between one of the two detection capacitors and one of the two input nodes, the first detection switch including a series circuit of a P-channel type MOS transistor and an N-channel type MOS transistor; a second detection switch for opening and closing a path between an other of the two capacitors and an other of the two input nodes, the second detection switch including a series circuit of a P-channel type MOS transistor and an N-channel type MOS transistor; a third detection switch for opening and closing a path between the one of the two detection capacitors and the other of the two input nodes, the third detection switch including a series circuit of a P-channel type MOS transistor and an N-channel type MOS transistor; a fourth detection switch for opening and closing a path between the other of the two detection capacitors and the one of the two input nodes, the fourth detection switch including a series circuit of a P-channel type MOS transistor and an N-channel type MOS transistor; a driving part for driving the first detection switch, the second detection switch, the third detection switch and the fourth detection switch thereby to turn on and off the first detection switch and the second detection switch and to turn on and off the third detection switch and the fourth detection switch complementarily; a minimum selector for selecting a lower one of the voltages of the two input nodes and applying a selected voltage as a substrate potential of the N-channel type MOS transistor; and a maximum selector for selecting a higher one of the voltages of the two input nodes and applying a selected voltage as a substrate potential of the P-channel type MOS transistor. - View Dependent Claims (9, 10, 11)
-
Specification