Method and device for radar applications

• US 10,254,385 B2
• Filed: 02/24/2016
• Issued: 04/09/2019
• Est. Priority Date: 02/19/2013
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Ygnace, Romain, Roger, Andre
• Primary Examiner(s): Gregory, Bernarr E
• Application Number:
  US15/052,099
• Publication Number:
  US 20160170010A1
• Time in Patent Office: 1,140 Days
• CPC Class Codes: G01S 13/02 Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
• CPC Class Codes: G01S 13/931 of land vehicles
• CPC Class Codes: G01S 7/02 of systems according to group G01S13/00
• CPC Class Codes: G01S 7/2883 using FFT processing
• CPC Class Codes: G01S 7/354 Extracting wanted echo-signals Doppler systems G01S13/50
• CPC Class Codes: G01S 7/356 involving particularities of FFT processing

Abstract

A device for radar applications includes a computing engine, a radar acquisition unit connected to the computing engine, a timer unit connected to the computing engine, a cascade input port, and a cascade output port. The cascade input port is configured to convey an input signal to the computing engine and the cascade output port is configured to convey an output signal from the computing engine. Further, an according system, a radar system, a vehicle with such radar system and a method are provided.

Claims

1. A device for radar applications, comprising:

a computing processor;

a radar acquisition hardware logic connected to the computing processor;

a timer hardware logic connected to the computing processor;

a cascade input port; and

a cascade output port,

wherein the cascade input port is configured to convey an input signal to the computing processor, and

wherein the cascade output port is configured to convey an output signal from the computing processor,

wherein the device is configurable as a master device or as a slave device.

2. The device according to claim 1, further comprising a communication hardware logic connected to the computing processor.

3. The device according to claim 2, wherein the communication hardware logic is configured to supply management data or configuration data to the computing processor.

4. The device according to claim 1, wherein the device is configurable as the master device by configuring the computing processor to a master mode and the device is configurable as the slave device by configuring the computing processor to a slave mode.

5. The device according to claim 4, wherein the device is configured in the slave mode to obtain data in a time domain and output data in a frequency domain.

6. The device according to claim 5, wherein the device conducts an FFT processing and provides FFT results that are processed at a subsequent device of the multi-stage processing.

7. The device according to of claim 4, wherein the device is configured in the master mode to obtain data in a time domain or frequency domain and output data as FFT data or in in a frequency domain.

8. The device according to claim 1, wherein the device is a single stage of a multi-stage processing.

9. The device according to claim 1, wherein the device is bootable via a network, in particular a network operated via the Internet protocol.

10. The device according to claim 1, wherein the output signal comprises a potential target list.

11. The device according to claim 1, wherein a timer hardware logic is configurable to be synchronized to a timer hardware logic of an external device.

12. The device according to claim 1, wherein a radio frequency signal from a radar radio frequency hardware logic is fed to the radar acquisition hardware logic.

13. The device according to claim 1, wherein the radar acquisition hardware logic comprises a radar radio frequency unit configured to receive a radar signal and provide a signal related thereto to the computing processor.

14. The device according to claim 1, wherein the radar acquisition hardware logic comprises a radio frequency signal processing means.

15. The device according to claim 1, wherein the radar acquisition hardware logic comprises an analog-to-digital converter.

16. The device according to claim 1, wherein FFT results are determined by the computing processor based on data from the radar acquisition hardware logic, and are forwarded via the cascade output port.

17. The device according to claim 1, wherein the cascade output port is configured to convey tracing or monitoring information.

18. The device according to claim 1, wherein the cascade output port is connected to a CAN bus interface.

19. The device according to claim 1, wherein the device is configured, in a single-chip mode, to obtain data in a time domain and output data as FFT data or in a frequency domain.

20. The device according to claim 1, wherein the device is a radar device that is in particular a single stage of a radar processing system.

21. A vehicle comprising at least one device for radar applications, said device comprising:

a computing processor;

a radar acquisition hardware logic connected to the computing processor;

a timer hardware logic connected to the computing processor;

a cascade input port; and

a cascade output port,

wherein the cascade input port is configured to convey an input signal to the computing processor, and

wherein the cascade output port is configured to convey an output signal from the computing processor,

wherein the device is configurable as a master device or as a slave device.