Dynamic load based memory tag management

• US 10,254,961 B2
• Filed: 02/21/2017
• Issued: 04/09/2019
• Est. Priority Date: 02/21/2017
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Gilda, Glenn D., Hodges, Mark R.
• Primary Examiner(s): Chappell, Daniel C
• Application Number:
  US15/438,355
• Publication Number:
  US 20180239534A1
• Time in Patent Office: 777 Days
• CPC Class Codes: G06F 13/1673 using buffers
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: G11C 11/4076 Timing circuits for regeneration management G11C11/406
• CPC Class Codes: G11C 2207/2245 Memory devices with an internal cache buffer
• CPC Class Codes: G11C 2207/2272 Latency related aspects
• CPC Class Codes: G11C 7/1063 Control signal output circuits, e.g. status or busy flags, feedback command signals

Abstract

A computer-implemented method for managing a memory control unit includes receiving a command at the memory control unit. The command includes a command type that either requires or does not require buffering resources. The method further includes determining, via the memory control unit, a number of available memory tags from a first set of memory tags that are associated with the buffering resources. The method includes determining, via the memory control unit, a number of available memory tags from a second set of memory tags that are not associated with the buffering resources. The method also includes dynamically adjusting, via the memory control unit, assignment of memory tags for use in the second set of memory tags based on the command type, the number of available memory tags from the first set of memory tags, and the number of available memory tags from the second set of memory tags.

Claims

1. A computer-implemented method for managing a memory control unit comprising:

receiving a command at the memory control unit, wherein the command comprises a command type that either requires or does not require buffering resources;

determining, via the memory control unit, a number of available memory tags from a first set of memory tags that are associated with the buffering resources;

determining, via the memory control unit, a number of available memory tags from a second set of memory tags that are not associated with the buffering resources;

dynamically adjusting, via the memory control unit, an assignment of memory tags for use in the second set of memory tags based on the command type, the number of available memory tags from the first set of memory tags, and the number of available memory tags from the second set of memory tags, wherein dynamically adjusting the assignment of the memory tags for use in the second set of memory tags comprises;

determining, via the memory control unit, whether the number of the second set of memory tags exceeds a first threshold indicative of a number of memory tags in use; and

determining, via the memory control unit, whether the number of the first set of memory tags exceeds a second threshold indicative of a number of memory tags in use; and

preventing any further allocation of a subset of the second set of memory tags when the first set of memory tags have exceeded the second threshold indicative of a number of memory tags in use.

2. The computer-implemented method of claim 1, further comprising:

making, via the memory control unit, a subset of the first set of memory tags available for allocation by command types associated with the second set of memory tags when the number of the second set of memory tags in use exceeds the first threshold and the number of tags from the first set of memory tags in use does not exceed the second threshold.

3. The computer-implemented method of claim 2, comprising returning the subset of the second set of memory tags for use by the command type associated with the second set of memory tags when the second set of memory tags in use have fallen below a third threshold indicative of the number of memory tags in use.

4. The computer-implemented method of claim 1, wherein the first set of memory tags is associated with fetch command types and the second set of memory tags is associated with store command types.

5. The computer-implemented method of claim 4, wherein the first set of memory tags requires dedicated data buffering for data returned from one or more memory buffer chips, and the second set of memory tags does not require data buffering for data returned from one or more memory buffer chips.

6. The computer-implemented method of claim 5, further comprising:

adding, via the memory control unit, registers in the memory control unit that change a first threshold and a second threshold.

7. The computer-implemented method of claim 6, further comprising:

adding, via the memory control unit, the registers in the memory control unit that change the second threshold based on real-time load conditions.

8. A system for managing a memory comprising:

a memory control unit configured to;

receive a command, wherein the command comprises a command type that either requires or does not require buffering resources;

determine a number of available memory tags from a first set of memory tags that are associated with the buffering resources;

determine a number of available memory tags from a second set of memory tags that are not associated with the buffering resources;

dynamically adjust an assignment of memory tags for use in the second set of memory tags based on the command type, the number of available memory tags from the first set of memory tags, and the number of available memory tags from the second set of memory tags, wherein the memory control unit is configured to dynamically adjust the assignment of the memory tags for use in the second set of memory tags by;

determining, via the memory control unit, whether the number of the second set of memory tags exceeds a first threshold indicative of a number of memory tags in use; and

determining, via the memory control unit, whether the number of the first set of memory tags exceeds a second threshold indicative of a number of memory tags in use; and

prevent any further allocation of a subset of the second set of memory tags when the first set of memory tags have exceeded the second threshold indicative of a number of memory tags in use.

9. The system of claim 8, wherein the memory control unit is further configured to:

make a subset of the first set of memory tags available for allocation by command types associated with the second set of memory tags when the number of the second set of memory tags in use exceeds the first threshold and the number of tags from the first set of memory tags in use does not exceed the second threshold.

10. The system of claim 9, wherein the memory control unit is further configured to return the subset of the second set of memory tags for use by the command type associated with the second set of memory tags when the second set of memory tags in use have fallen below a third threshold indicative of the number of memory tags in use.

11. The system of claim 8, wherein the first set of memory tags is associated with fetch command types and the second set of memory tags is associated with store command types.

12. The system of claim 11, wherein the first set of memory tags requires dedicated data buffering for data returned from one or more memory buffer chips, and the second set of memory tags does not require data buffering for data returned from one or more memory buffer chips.

13. The system of claim 8, wherein the memory control unit is configured to:

add registers in the memory control unit that change a first threshold and a second threshold.

14. The system of claim 8, wherein the memory control unit is configured to prevent any further allocation of when the second set of memory tags have fallen below a third threshold indicative of available memory tags.

15. The system of claim 11, wherein the memory control unit is configured to:

add registers in the memory control unit that change the first threshold and the second threshold in response to real-time load conditions; and

add a register in the memory control unit that defines the number of tags in a subset of the first set of memory tags available for allocation by command types associated with the second set of memory tags.

16. A computer program product for managing a memory control unit comprising, the computer program product comprising a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions executable by a memory control unit to cause the memory control unit to perform a method comprising:

receiving a command at the memory control unit, wherein the command comprises a command type that either requires or does not require buffering resources;

determining, via the memory control unit, a number of available memory tags from a first set of memory tags that are associated with the buffering resources;

determining, via the memory control unit, a number of available memory tags from a second set of memory tags that are not associated with the buffering resources;

dynamically adjusting, via the memory control unit, an assignment of memory tags for use in the second set of memory tags based on the command type, the number of available memory tags from the first set of memory tags, and the number of available memory tags from the second set of memory tags, wherein dynamically adjusting the assignment of the memory tags for use in the second set of memory tags comprises;

determining, via the memory control unit, whether the number of the second set of memory tags exceeds a first threshold indicative of a number of memory tags in use; and

determining, via the memory control unit, whether the number of the first set of memory tags exceeds a second threshold indicative of a number of memory tags in use; and

preventing any further allocation of a subset of the second set of memory tags when the first set of memory tags have exceeded the second threshold indicative of a number of memory tags in use.