Semiconductor integrated circuit
First Claim
1. A semiconductor integrated circuit including first and second semiconductor chips that are vertically stacked, the first semiconductor chip comprising:
- a plurality of column data driving circuit configured to receive a plurality of first column data transmitted in a DDR scheme from the second semiconductor chip, based on an alignment strobe signal, and load the plurality of first column data on a plurality of data input/output lines; and
an alignment strobe signal driving circuit configured to delay a column strobe signal transmitted from the second semiconductor chip that is source-synchronized with the first column data, by a given delay time, and generate the alignment strobe signal.
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Abstract
A semiconductor integrated circuit including first semiconductor chip and second semiconductor chip that are vertically stacked, wherein the first semiconductor chip includes a first column data driving circuit configured to transmit internal data to the second semiconductor chip in a DDR (double data rate) scheme based on an internal strobe signal, and a first column strobe signal driving circuit configured to generate first column strobe signals that are source-synchronized with first column data transmitted to the second semiconductor chip by the first column data driving circuit, based on the internal strobe signal, and transmit the first column strobe signals to the second semiconductor chip.
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Citations
6 Claims
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1. A semiconductor integrated circuit including first and second semiconductor chips that are vertically stacked, the first semiconductor chip comprising:
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a plurality of column data driving circuit configured to receive a plurality of first column data transmitted in a DDR scheme from the second semiconductor chip, based on an alignment strobe signal, and load the plurality of first column data on a plurality of data input/output lines; and an alignment strobe signal driving circuit configured to delay a column strobe signal transmitted from the second semiconductor chip that is source-synchronized with the first column data, by a given delay time, and generate the alignment strobe signal. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification