Oxide thin film transistor and method of fabricating the same

• US 10,256,344 B2
• Filed: 02/27/2018
• Issued: 04/09/2019
• Est. Priority Date: 05/14/2013
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Bae, JongUk
• Primary Examiner(s): Kraig, William F
• Assistant Examiner(s): Ivanov, Pavel G.
• Application Number:
  US15/906,498
• Publication Number:
  US 20180204952A1
• Time in Patent Office: 406 Days
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78636 with supplementary region or layer for improving the flatness of the device
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

The present disclosure relates to an oxide thin film transistor and a fabricating method thereof. In the oxide thin film transistor, which uses amorphous zinc oxide (ZnO) semiconductor as an active layer, damage to the oxide semiconductor due to dry etching may be minimized by forming source and drain electrodes in a multilayered structure having at least two layers, and improving stability and reliability of a device by employing a dual passivation layer structure, which includes a lower layer for overcoming an oxygen deficiency and an upper layer to minimize effects of an external environment on the multilayered source and drain electrodes.

Claims

1. A thin film transistor, comprising:

an active layer of an oxide semiconductor;

source and drain electrodes on the active layer, wherein the source and drain electrodes comprise first source and drain electrodes of a second conductive film on the active layer, and second source and drain electrodes of a third conductive film on the first source and drain electrodes;

a gate insulating layer on the active layer between the source and drain electrodes;

a gate electrode of a first conductive film on the gate insulating layer;

an in-situ protection layer of an oxide of the second conductive film on the active layer and the gate electrode; and

a passivation layer on the in-situ protection layer, the passivation layer directly contacting the third conductive film and the in-situ protection layer that are located over the active layer of the oxide semiconductor.

2. The thin film transistor of claim 1, wherein the second conductive film has a low contact resistance with respect to the oxide semiconductor, and wherein the third conductive film has a low resistivity, irrespective of contact resistance with respect to the oxide semiconductor.

3. The thin film transistor of claim 1, wherein the first source and drain electrodes comprise at least one of Ti, Ti alloy, Mo and Mo alloy, the second source and drain electrodes comprise at least one of Cu, Ag and Mo.

4. The thin film transistor of claim 1, wherein the passivation layer comprises at least one of TiOx, Ta Ox, AlOx and SiOx.

5. The thin film transistor of claim 1, wherein the oxide semiconductor is an amorphous zinc-based oxide semiconductor.

6. The thin film transistor of claim 1, wherein the second conductive film has a thickness in a range of 50 Å

to 300 Å

.

7. The thin film transistor of claim 1, wherein the passivation layer has a higher density than the in-situ protection layer.

8. A thin film transistor, comprising:

an active layer of an oxide semiconductor;

source and drain electrodes on the active layer, wherein the source and drain electrodes comprise first source and drain electrodes of a second conductive film on the active layer, and second source and drain electrodes of a third conductive film on the first source and drain electrodes;

a gate insulating layer on the active layer between the source and drain electrodes;

a gate electrode of a first conductive film on the gate insulating layer;

an in-situ protection layer of an oxide of the second conductive film on the active layer and the gate electrode;

a lower passivation layer on the in-situ protection layer, the lower passivation layer directly contacting the third conductive film and the in-situ protection layer that are located over the active layer of the oxide semiconductor; and

an upper passivation layer on the lower passivation layer.