Method for manufacturing nitride semiconductor substrate

• US 10,260,146 B2
• Filed: 09/09/2016
• Issued: 04/16/2019
• Est. Priority Date: 09/11/2015
• Status: Active Grant

• Current Assignee: MIE University
• Original Assignee: MIE University
• Inventors: Miyake, Hideto
• Primary Examiner(s): Ho, Anthony
• Application Number:
  US15/763,782
• Publication Number:
  US 20180274088A1
• Time in Patent Office: 949 Days
• CPC Class Codes: C23C 16/18 from metallo-organic compounds
• CPC Class Codes: C23C 16/303 Nitrides
• CPC Class Codes: C23C 16/34 Nitrides C23C16/303 takes precedence
• CPC Class Codes: C30B 29/38 Nitrides
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: C30B 33/02 Heat treatment C30B33/04, C30B33/06 take precedence
• CPC Class Codes: H01L 21/02172 the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides materials containing silicon H01L21/02123; metal silicates H01L21/02142
• CPC Class Codes: H01L 21/02205 the layer being characterised by the precursor material for deposition
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/02378 Silicon carbide
• CPC Class Codes: H01L 21/02389 Nitrides
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02658 Pretreatments cleaning in general H01L21/02041
• CPC Class Codes: H01L 21/20 Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/3245 : of AIIIBV compounds

Abstract

A method for manufacturing a nitride semiconductor substrate includes: a preparation step of preparing a sapphire substrate; and a buffer layer forming step of forming an AlN buffer layer on the sapphire substrate, wherein the buffer layer forming step includes: a group III nitride semiconductor forming step of forming a precursor of an AlN buffer layer on the sapphire substrate; and an annealing step of annealing the sapphire substrate on which the precursor of the AlN buffer layer is formed in a gas-tight state in which a principal surface of the precursor of the AlN buffer layer is covered with a cover member (such as a sapphire substrate) for inhibiting a component of the group III nitride semiconductor from dissociating from the principal surface of the formed precursor of the AlN buffer layer.

Claims

1. A method for manufacturing a nitride semiconductor substrate, the method comprising:

a step of placing a semiconductor substrate which includes a sapphire substrate and a precursor of an aluminum nitride (AlN) buffer layer in an annealing furnace such that the precursor and a cover member face each other with at most a 0.5-mm spacing therebetween to inhibit dissociation of an AlN component due to heating the semiconductor substrate, the precursor being formed on a surface of the sapphire substrate and including AlN grains; and

a step of annealing the semiconductor substrate in the annealing furnace in an inert gas atmosphere for at least 20 minutes at a temperature of the semiconductor substrate in a range from 1600°

C. to 1750°

C., wherein

a full width at half maximum of an X-ray rocking curve of a (10-12) plane of the annealed semiconductor substrate is less than or equal to 1000 arcsec.

2. The method according to claim 1, wherein

the semiconductor substrate is placed in the annealing furnace in a state in which movement of the semiconductor substrate is limited from a periphery side by a substrate holder in the annealing furnace.

3. The method according to claim 1, wherein

the precursor of the AlN buffer layer is formed by sputtering.

4. A method for manufacturing a nitride semiconductor substrate, the method comprising:

a preparation step of preparing a substrate which includes at least one of sapphire, silicon carbide, and aluminum nitride in a container which is coverable with a lid while the substrate is stored in the container, and includes, in the container, a substrate holder which limits movement of the substrate from a periphery side of the substrate;

a buffer layer forming step of forming, on the substrate, a precursor of a buffer layer which includes a group III nitride semiconductor represented by Al_xGa_yIn_(1-x-y)N, where 0≤

x≤

1, 0≤

y≤

1, and (x+y)≤

1, in the container in an uncovered state;

a step of creating a gas-tight state in the container by covering the container with the lid after forming the precursor of the buffer layer; and

an annealing step of annealing the nitride semiconductor substrate on which the precursor of the buffer layer which includes the group III nitride semiconductor is formed through the buffer layer forming step, in an inert gas atmosphere and at a temperature higher than a temperature in the buffer layer forming step.

5. A method for manufacturing a nitride semiconductor substrate, the method comprising:

a step of placing, in an annealing furnace, a semiconductor substrate which includes;

a substrate which includes one of sapphire, silicon carbide, and aluminum nitride; and

a precursor of a buffer layer which includes a group III nitride semiconductor represented by Al_xGa_yIn_(1-x-y)N, where 0≤

x≤

1, 0≤

y≤

1, and (x+y)≤

1, such that the precursor and a cover member face each other with at most a 0.5-mm spacing therebetween to inhibit dissociation of a component of the group III nitride semiconductor due to heating the semiconductor substrate, the precursor being formed on a surface of the substrate and including group III nitride semiconductor grains; and

a step of annealing the semiconductor substrate in the annealing furnace in an inert gas atmosphere for at least 20 minutes at a temperature of the semiconductor substrate in a range from 1400°

C. to 1750°

C.

6. The method according to claim 5, wherein

the semiconductor substrate is placed in the annealing furnace in a state in which movement of the semiconductor substrate is limited from a periphery side by a substrate holder in the annealing furnace.

7. The method according to claim 6, wherein

the cover member is another semiconductor substrate on which a precursor of a buffer layer which includes a group III nitride semiconductor same as the precursor of the buffer layer which includes the group III nitride semiconductor is formed, and

the other semiconductor substrate is placed above the semiconductor substrate such that the buffer layer which includes the group III nitride semiconductor formed on the semiconductor substrate and the buffer layer which includes the group III nitride semiconductor formed on the other semiconductor substrate face each other.

8. The method according to claim 7, wherein

the substrate holder has a depth that allows the substrate holder to hold at least two semiconductor substrates each of which is either the semiconductor substrate or the other semiconductor substrate, and

the substrate holder has at least three disposition grooves in each of which a spacer for forming a spacing between the precursors formed on the at least two semiconductor substrates when the at least two semiconductor substrates are stacked.

9. The method according to claim 6, wherein

a bottom-side lid which forms a bottom of the substrate holder is further provided, and

a surface of the cover member or the bottom-side lid which faces the precursor has grooves having a predetermined depth and forming protrusions and recesses or is roughened to a predetermined depth, and is in contact with at least a perimeter portion of the precursor.

10. The method according to claim 6, wherein

the group III nitride semiconductor included in the buffer layer is one of aluminum nitride, gallium nitride, aluminum gallium nitride, and aluminum gallium indium nitride,

the cover member includes at least one of a group III nitride semiconductor, carbon, boron nitride, sapphire, ceramic, silicon carbide, refractory metal, zirconia, and tantalum carbide,

the refractory metal is at least one of molybdenum, tungsten, iridium, and an alloy of at least two of molybdenum, tungsten, and iridium, and

a body of the substrate holder includes at least one material among a group III nitride semiconductor including aluminum nitride, carbon, boron nitride (BN), pyrolytic boron nitride (PBN), aluminum oxide, ceramic, silicon carbide, refractory metal, and zirconia.

11. The method according to claim 9, wherein

the bottom-side lid includes at least one of a group III nitride semiconductor, carbon, boron nitride, sapphire, ceramic, silicon carbide, refractory metal, zirconia, and tantalum carbide, and

the refractory metal is at least one of molybdenum, tungsten, iridium, and an alloy of at least two of molybdenum, tungsten, and iridium.

12. The method according to claim 5, comprising:

after the step of annealing the semiconductor substrate, a surface treatment step of setting a temperature in the annealing furnace used in the step of annealing the semiconductor substrate to an ambient temperature in a range from 1000°

C. to 1300°

C., making an atmosphere of a mixed gas containing ammonia and hydrogen or nitrogen in the annealing furnace, and leaving the buffer layer for a predetermined time period.

13. A method for manufacturing a nitride semiconductor substrate, the method comprising:

a step of placing, in an annealing furnace, a semiconductor substrate which includes;

a substrate which includes one of sapphire, silicon carbide, and aluminum nitride; and

a precursor of a buffer layer which includes a group III nitride semiconductor represented by Al_xGa_yIn_(1-x-y)N, where 0≤

x≤

1, 0≤

y≤

1, and (x+y)≤

1, such that the precursor and a base face each other to inhibit dissociation of a component of the group III nitride semiconductor due to heating the semiconductor substrate, the precursor being formed on a surface of the substrate and including group III nitride semiconductor grains; and

a step of annealing the semiconductor substrate in the annealing furnace for at least 20 minutes at a temperature of the semiconductor substrate in a range from 1400°

C. to 1750°

C. in an inert gas atmosphere, wherein

a full width at half maximum of an X-ray rocking curve of a (10-12) plane of the annealed semiconductor substrate is less than or equal to 1000 arcsec.

14. The method according to claim 13, wherein

a surface of the base which faces the precursor has grooves having a predetermined depth and forming protrusions and recesses or is roughened to a predetermined depth.