Apparatus, systems and methods for generating voltage excitation waveforms

• US 10,268,220 B2
• Filed: 07/14/2016
• Issued: 04/23/2019
• Est. Priority Date: 07/14/2016
• Status: Active Grant

• Current Assignee: Radio Systems Corporation
• Original Assignee: Radio Systems Corporation
• Inventors: McFarland, Scott A, Griffith, Keith R
• Primary Examiner(s): Donovan, Lincoln D
• Assistant Examiner(s): Cheng, Diana J.
• Application Number:
  US15/210,498
• Publication Number:
  US 20180017981A1
• Time in Patent Office: 1,013 Days
• Field of Search: 327432, 327383
• CPC Class Codes: A01K 15/023 Anti-evasion devices
• CPC Class Codes: G01R 19/02 Measuring effective values, i.e. root-mean-square values
• CPC Class Codes: G05F 1/468 characterised by reference voltage circuitry, e.g. soft start, remote shutdown
• CPC Class Codes: H04B 1/04 Circuits

Abstract

A method described herein includes describing a load current with a discrete time function. The method includes using a first frequency and a second frequency to provide an approximation of the described load current, wherein a transform applied to the discrete time function identifies the first frequency and the second frequency. The method includes estimating a loop inductance and a loop resistance of a wire loop by exciting a transmit circuit with a voltage reference step waveform, wherein the transmit circuit includes the wire loop. The method includes scaling the approximated load current to a level sufficient to generate a minimum receive voltage signal in a receiver at a first distance between the wire loop and the receiver. The method includes generating a first voltage signal using the scaled load current, estimated loop inductance, and estimated loop resistance. The method includes exciting the transmit circuit with the first voltage signal.

Claims

1. A method comprising,

one or more applications running on at least one processor for providing,

describing a load current with a discrete time function, wherein an input to the discrete time function used to describe the load current comprises a rotating phasor;

using a first frequency and a second frequency to provide an approximation of the described load current, wherein a transform applied to the discrete time function identifies the first frequency and the second frequency;

estimating a loop inductance and a loop resistance of a wire loop by exciting a transmit circuit with a voltage reference step waveform, wherein the transmit circuit includes the wire loop;

scaling the approximated load current to a level sufficient to generate a minimum receive voltage signal in a receiver at a first distance between the wire loop and the receiver;

generating a first voltage signal using the scaled load current, the estimated loop inductance, and the estimated loop resistance;

exciting the transmit circuit with the first voltage signal.

2. The method of claim 1, wherein the estimating the loop inductance and the loop resistance includes monitoring the transmit circuit'"'"'s current in response to the voltage reference step waveform.

3. The method of claim 2, wherein the monitoring the transmit circuit'"'"'s current includes capturing current amplitude as a function of time in response to the voltage reference step waveform.

4. The method of claim 1, wherein the transform comprises a Discrete Fourier Transform.

5. The method of claim 1, wherein the first frequency comprises a first harmonic frequency of the described load current.

6. The method of claim 5, wherein the second frequency comprises a second harmonic frequency of the described load current.

7. The method of claim 6, comprising generating a first carrier component of the approximated load current using the first harmonic frequency, wherein the first carrier component has a weight of one.

8. The method of claim 7, comprising generating a second carrier component of the approximated load current using the second harmonic frequency, wherein an amplitude of the second carrier component is weighted relative to an amplitude of the first carrier component.

9. The method of claim 8, wherein the transform applied to the discrete time function used to describe the load current identifies the relative weight of the second carrier component.

10. The method of claim 8, wherein the providing the approximation of the described load current includes summing the first carrier component and the second carrier component.

11. The method of claim 1, wherein the approximated load current comprises a discrete time function.

12. The method of claim 1, wherein the first voltage signal comprises a discrete time function.

13. The method of claim 1, wherein the phasor value periodically rotates between 0 and 2π

radians.

14. The method of claim 13, wherein the discrete time function used to describe the load current has a first slope when the phasor value is within a first range.

15. The method of claim 14, wherein the first slope is positive.

16. The method of claim 14, wherein the discrete time function used to describe the load current has a second slope when the phasor value is within a second range.

17. The method of claim 14, wherein the second slope is negative.

18. The method of claim 14, wherein the first range comprises approximately thirty percent of 2.pi. radians.

19. The method of claim 18, wherein the absolute value of the first slope is greater than the absolute value of the second slope.

20. The method of claim 1, comprising reading a voltage signal at a location in the transmit circuit, wherein the voltage signal is representative of a corresponding transmit current in the transmit circuit.

21. The method of claim 20, comprising processing the voltage signal to estimate the receive voltage signal.

22. The method of claim 21, the estimating including determining a root mean square (RMS) of the estimated receive voltage signal.

23. The method of claim 22, the estimating including determining an asymmetry of the estimated receive voltage signal.

24. The method of claim 23, wherein the asymmetry comprises a ratio of the aggregate positive and aggregate negative peaks of the estimated receive voltage signal.

25. The method of claim 23, comprising establishing a target RMS value.

26. The method of claim 25, wherein a target RMS range comprises the target RMS value plus or minus a percentage.

27. The method of claim 26, comprising establishing a target asymmetry value.

28. The method of claim 27, wherein a target asymmetry range comprises the target asymmetry value plus or minus a percentage.

29. The method of claim 28, comprising iteratively adjusting an impedance vector of the transmit circuit until the RMS and the asymmetry of estimated receive voltage signal fall within the corresponding target RMS and asymmetry ranges, wherein the impedance vector initially comprises the loop resistance and the loop inductance.

30. The method of claim 29, the adjusting comprising scaling the impedance vector when the RMS falls outside the target RMS range.

31. The method of claim 29, the adjusting comprising rotating a phase angle of the impedance vector when the asymmetry falls outside the target asymmetry range.

32. The method of claim 31, the rotating the phase angle comprising a negative rotation.

33. The method of claim 31, the rotating the phase angle comprising a positive rotation.

34. The method of claim 1, wherein the described load current comprises an asymmetry.

35. The method of claim 34, wherein the receiver exploits the asymmetry to determine the receiver'"'"'s direction of approach to the wire loop carrying the described load current.