Voltage sensor-less position detection in an active front end

• US 10,270,327 B1
• Filed: 10/13/2017
• Issued: 04/23/2019
• Est. Priority Date: 10/13/2017
• Status: Active Grant

• Current Assignee: Deere & Company
• Original Assignee: Deere & Company
• Inventors: Fu, Tianjun, Wu, Long, Wanner, Kent, Dickherber, Jason, Tremel, Chris J.
• Primary Examiner(s): Dole, Timothy J.
• Assistant Examiner(s): Kyaw, Htet Z
• Application Number:
  US15/783,057
• Publication Number:
  US 20190115820A1
• Time in Patent Office: 557 Days
• Field of Search: 363132
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 1/4216 operating from a three-phase input voltage H02M1/4233 takes precedence
• CPC Class Codes: H02M 7/53871 with automatic control of output voltage or current
• CPC Class Codes: H02M 7/5395 by pulse-width modulation
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A controller may include a memory having computer-readable instructions stored therein; and a processor configured to execute the computer-readable instructions to generate Pulse Width Modulation (PWM) signals to control power switches of an Active Front End (AFE) inverter based on at least a synthesized grid voltage vector angle at a terminal of an alternating current (AC) grid without using physical voltage sensors at the terminal of the AC grid, and control the AFE inverter to supply power to a load based on the PWM signals.

Claims

1. A controller comprising:

a memory having computer-readable instructions stored therein; and

a processor configured to execute the computer-readable instructions to,

estimate a synthesized grid voltage vector angle at a terminal of an alternating current (AC) grid without using physical voltage sensors at the terminal of the AC grid by,

estimating a terminal voltage of an Active Front End (AFE) inverter when the AFE inverter is enabled, the terminal voltage of the AFE inverter being a voltage of a terminal of the AFE inverter,

estimating a first AFE inverter terminal voltage vector angle when the AFE inverter is disabled, the first AFE inverter terminal voltage vector angle being an angle associated with the voltage vector of the terminal of the AFE inverter at an initial time,

determining a second AFE inverter terminal voltage vector angle when the AFE inverter is enabled, the second AFE inverter terminal voltage vector angle being an angle associated with the voltage vector of the terminal of the AFE inverter at a second time subsequent to the initial time, and

estimating the synthesized grid voltage vector angle based on the second AFE inverter terminal voltage vector angle, the synthesized grid voltage vector angle being an angle associated with a voltage vector at the terminal of the AC grid;

generate Pulse Width Modulation (PWM) signals to control power switches of the AFE inverter based on at least (i) the synthesized grid voltage vector angle at the terminal of the AC grid and (ii) a AC grid terminal reference power factor, the AC grid terminal reference power factor representing a desired phase shift between the voltage vector and a current vector at the terminal of the AC grid; and

control the AFE inverter to supply power to a load based on the PWM signals.

2. The controller of claim 1, wherein the processor is configured to generate the PWM signals by,

converting measured current from a measured 3-phase current in a stationary reference frame to a measured direct-quadrature (dq)-axis current in a dq rotating reference frame,

generating a q-axis current reference based on the AC grid terminal reference power factor,

generating a d-axis current reference based on an actual DC bus voltage and a reference DC bus voltage, the actual DC bus voltage being connected to the load, the d-axis current reference and the q-axis current reference forming a dq-axis current reference,

generating dq-axis reference voltages based on the measured dq-axis current in the dq rotating reference frame and the dq-axis current reference, and

generating 3-phase gate driving signals for the AFE inverter by converting the dq-axis reference voltages based on the synthesized grid voltage vector angle, the 3-phase gate driving signals being the PWM signals.

3. The controller of claim 2, wherein the processor is configured to convert the measured current from the measured 3-phase current to the measured dq-axis current based on the synthesized grid voltage vector angle.

4. The controller of claim 2, wherein the processor is configured to generate the d-axis current reference by,

comparing the actual dc bus voltage and the reference DC bus voltage, and

generating the d-axis current reference using a PI controller.

5. The controller of claim 2, wherein the processor is configured to generate the q-axis current reference based on the AC grid terminal reference power factor and the d-axis current reference.

6. The controller of claim 2, wherein the processor is configured to generate the dq-axis reference voltages by,

generating a comparison signal based on a result of comparing the d-axis current reference and the q-axis current reference with a d-axis value of the measured dq-axis current and a q-axis value of the measured dq-axis current, respectively, and

generating dq-axis reference voltages based on the comparison signal.

7. The controller of claim 2, wherein the processor is configured to,

refine the synthesized grid voltage vector angle by compensating for a time delay associated with digital processing to generate a refined synthesized grid voltage vector angle, and

generate the 3-phase gate driving signals for the AFE inverter based on the dq-axis reference voltages and the refined synthesized grid voltage vector angle, wherein

the 3-phase gate driving signals are transmitted to the AFE inverter to switch a plurality of half bridges included in the power switches of the AFE inverter.

8. The controller of claim 1, wherein the processor is configured to generate the PWM signals such that the AFE inverter maintains an actual DC bus voltage connected to the load.

9. The controller of claim 1, wherein, if the inverter is enabled, the processor is configured to estimate the terminal voltage of the AFE inverter by,

estimating 3-phase line-to-neutral voltages of the terminal of the AFE inverter based on status signals associated with power switches of the AFE inverter and corresponding voltage drops across the power switches.

10. The controller of claim 9, wherein the processor is configured to estimate the 3-phase line-to-neutral voltages by,

examining collector-emitter voltages associated with each of the power switches of the AFE inverter.

11. The controller of claim 1, wherein, if the inverter is disabled, the processor is configured to estimate the first AFE inverter terminal voltage vector angle by,

detecting zero-crossing instants when the voltage of the terminal of the AFE inverter crosses zero,

calculating a AFE inverter terminal voltage vector angular frequency based on the zero-crossing instants, the AFE inverter terminal voltage vector angular frequency being an angular frequency in rad/sec of the voltage of the terminal of the AFE inverter, and

calculating the first AFE inverter terminal voltage vector angle based on the AFE inverter terminal voltage vector angular frequency and a position of an AFE inverter terminal voltage vector corresponding to a most recent one of the zero-crossing instants.

12. The controller of claim 1, wherein the processor is configured to estimate the second AFE inverter terminal voltage vector angle by,

initializing a phase locking loop (PLL) using the first AFE inverter terminal voltage vector angle when the inverter is disabled, and

running the phase locking loop (PLL) using 3-phase line-to-neutral voltages of the terminal of the AFE inverter when the inverter is enabled.

13. The controller of claim 12, wherein the processor is configured to estimate the second AFE inverter terminal voltage vector angle by running the PLL to align the second AFE inverter terminal voltage vector angle with a d-axis of a dq rotating reference frame.

14. The controller of claim 13, wherein, when the AFE inverter is enabled, the processor is configured to estimate the second AFE inverter terminal voltage vector angle by running the PLL to continually,

calculate a position error between the second AFE inverter terminal voltage vector angle and the d-axis,

calculate an angular frequency of the second AFE inverter terminal voltage vector angle by using a PI controller to regulate the position error, and

calculate the second AFE inverter terminal voltage vector angle by integrating the angular frequency.

15. The controller of claim 1, wherein the processor is configured to estimate the AC grid voltage vector angle by compensating for an actual phase shift due to a voltage drop across a filter between the terminal of the AFE inverter and the terminal of the AC grid.

16. The controller of claim 15, wherein the filter is one of a LCL line filter and a LR line filter.

17. A method of generating Pulse Width Modulation (PWM) signals for power switches of an Active Front End (AFE) inverter, the method comprising:

estimating a synthesized grid voltage vector angle at a terminal of an alternating current (AC) grid without using physical voltage sensors at the terminal of the AC grid by,

estimating a terminal voltage of the AFE inverter when the AFE inverter is enabled, the terminal voltage of the AFE inverter being a voltage of a terminal of the AFE inverter,

estimating a first AFE inverter terminal voltage vector angle when the AFE inverter is disabled, the first AFE inverter terminal voltage vector angle being an angle associated with the voltage vector of the terminal of the AFE inverter at an initial time,

determining a second AFE inverter terminal voltage vector angle when the AFE inverter is enabled, the second AFE inverter terminal voltage vector angle being an angle associated with the voltage vector of the terminal of the AFE inverter at a second time subsequent to the initial time, and

estimating the synthesized grid voltage vector angle based on the second AFE inverter terminal voltage vector angle, the synthesized grid voltage vector angle being an angle associated with a voltage vector at the terminal of the AC grid;

generating the PWM signals to control the power switches of the AFE inverter based on at least (i) the synthesized grid voltage vector angle at the terminal of the AC grid and (ii) a AC grid terminal reference power factor, the AC grid terminal reference power factor representing a desired phase shift between the voltage vector and a current vector at the terminal of the AC grid; and

controlling the AFE inverter to supply power to a load based on the PWM signals.

18. The method of claim 17, wherein the generating the PWM signals comprises:

converting measured current from a measured 3-phase current in a stationary reference frame to a measured direct-quadrature (dq)-axis current in a dq rotating reference frame;

generating a q-axis current reference based on the AC grid terminal reference power factor,

generating a d-axis current reference based on an actual DC bus voltage and a reference DC bus voltage, the actual DC bus voltage being connected to the load, the d-axis current reference and the q-axis current reference forming a dq-axis current reference;

generating dq-axis reference voltages based on the measured dq-axis current in the dq rotating reference frame and the dq-axis current reference; and

generating 3-phase gate driving signals for the AFE inverter by converting the dq-axis reference voltages based on the synthesized grid voltage vector angle, the 3-phase gate driving signals being the PWM signals.

19. The method of claim 17, wherein the generating the PWM signals generates the PWM signals such that the AFE inverter maintains an actual DC bus voltage connected to the load.

20. A controller comprising:

a memory having computer-readable instructions stored therein; and

a processor configured to execute the computer-readable instructions to,

estimate a synthesized grid voltage vector angle at a terminal of an alternating current (AC) grid without using physical voltage sensors at the terminal of the AC grid;

generate Pulse Width Modulation (PWM) signals to control power switches of an Active Front End (AFE) inverter based on at least (i) the synthesized grid voltage vector angle at the terminal of the AC grid and (ii) a AC grid terminal reference power factor without using physical voltage sensors at the terminal of the AC grid, the AC grid terminal reference power factor representing a desired phase shift between a voltage vector and a current vector at the terminal of the AC grid, wherein the controller is configured to generate the PWM signals by,

converting measured current from a measured 3-phase current in a stationary reference frame to a measured direct-quadrature (dq)-axis current in a dq rotating reference frame,

generating a q-axis current reference based on the AC grid terminal reference power factor,

generating a d-axis current reference based on an actual DC bus voltage and a reference DC bus voltage, the actual DC bus voltage being connected to a load, the d-axis current reference and the q-axis current reference forming a dq-axis current reference,

generating dq-axis reference voltages based on the measured dq-axis current in the dq rotating reference frame and the dq-axis current reference, and

generating 3-phase gate driving signals for the AFE inverter by converting the dq-axis reference voltages based on the synthesized grid voltage vector angle, the 3-phase gate driving signals being the PWM signals; and

control the AFE inverter to supply power to the load based on the PWM signals.