Ultraviolet reflective rough adhesive contact

• US 10,276,749 B2
• Filed: 09/18/2017
• Issued: 04/30/2019
• Est. Priority Date: 01/09/2013
• Status: Active Grant

• Current Assignee: Sensor Electronic Technology Incorporated (Seoul Semiconductor Co., Ltd.)
• Original Assignee: Sensor Electronic Technology Incorporated (Seoul Semiconductor Co., Ltd.)
• Inventors: Gaska, Remigijus, Shatalov, Maxim S., Dobrinsky, Alexander, Yang, Jinwei, Shur, Michael, Simin, Grigory
• Primary Examiner(s): Ahmed, Shahed
• Application Number:
  US15/706,990
• Publication Number:
  US 20180026157A1
• Time in Patent Office: 589 Days
• Field of Search: 257 13, 257739, 257103, 257 98, 257309, 438 29, 438 69, 438669, 438478, 438 47, 438 71
• CPC Class Codes: H01L 21/02496 Layer structure
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/06102 the bonding areas being at different heights
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/1703 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/14 of a plurality of bump connectors
• CPC Class Codes: H01L 29/151 Compositional structures H01L29/157 and H01L29/158 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/30 containing only elements of Group III and Group V of the Periodic Table
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/38 with a particular shape

Abstract

A device including a first semiconductor layer and a contact to the first semiconductor layer is disclosed. An interface between the first semiconductor layer and the contact includes a first roughness profile having a characteristic height and a characteristic width. The characteristic height can correspond to an average vertical distance between crests and adjacent valleys in the first roughness profile. The characteristic width can correspond to an average lateral distance between the crests and adjacent valleys in the first roughness profile.

Claims

1. A device comprising:

a first semiconductor layer formed of a first group III nitride material;

a contact to the first semiconductor layer;

a second semiconductor layer located between the first semiconductor layer and the contact, wherein the second semiconductor layer comprises a second group III nitride material having a gallium molar fraction greater than 0.8, and wherein a composition of the first semiconductor layer is laterally homogeneous and a composition of the second semiconductor layer is laterally inhomogeneous, and wherein an interface between the second semiconductor layer and the contact includes a first roughness profile having a characteristic height between 3 and 20 nanometers and a characteristic width within a range of approximately 0.1 micron to approximately 50 microns.

2. The device of claim 1, further comprising an interlayer located between the second semiconductor layer and the contact, wherein the interlayer comprises a plurality of islands each having a closed boundary that is separate from the second semiconductor layer and the contact, wherein some of the plurality of islands have a boundary that extends into both the second semiconductor layer and the contact.

3. The device of claim 2, wherein the plurality of islands comprise at least one of:

metal, oxide, nitride, or graphene.

4. The device of claim 2, wherein at least some of the plurality of islands are formed of an oxide.

5. The device of claim 2, further comprising a plurality of metallic protrusions that extend from the interlayer into at least the second semiconductor layer.

6. The device of claim 1, wherein the characteristic height is an average vertical distance between adjacent crests and valleys of the first roughness profile, and wherein the characteristic width is an average lateral distance between adjacent crests and valleys of the first roughness profile.

7. The device of claim 1, wherein the second semiconductor layer is laterally inhomogeneous.

8. The device of claim 1, wherein the device is configured to operate as an ultraviolet light emitting diode.

9. The device of claim 1, wherein the first roughness profile is formed from a plurality of stepped portions of the first semiconductor layer.

10. The device of claim 1, wherein the first semiconductor layer is a p-type semiconductor layer.

11. A device comprising:

an active region configured to sense or emit ultraviolet light;

a first semiconductor layer formed on a p-type side of the active region;

an ultraviolet reflective contact to the first semiconductor layer;

a second p-type semiconductor layer located between the first semiconductor layer and the contact, wherein an interface between the second semiconductor layer and the contact includes a first roughness profile with a characteristic height and a characteristic width, wherein the characteristic height is an average vertical distance between adjacent crests and valleys of the first roughness profile and is between 3 and 20 nanometers, and wherein the characteristic width is an average lateral distance between adjacent crests and valleys of the first roughness profile and is within a range of approximately 0.1 micron to approximately fifty microns.

12. The device of claim 11, wherein a composition of the first semiconductor layer is laterally homogeneous and a composition of the second semiconductor layer is laterally inhomogeneous.

13. The device of claim 11, wherein the second semiconductor layer comprises a second group III nitride material having a gallium molar fraction greater than 0.8.

14. The device of claim 11, further comprising an interlayer located between the second semiconductor layer and the contact, wherein the interlayer comprises a plurality of islands each having a closed boundary that is separate from the second semiconductor layer and the contact, wherein some of the plurality of islands have a boundary that extends into both the second semiconductor layer and the contact.

15. The device of claim 14, wherein the plurality of islands comprise at least one of:

metal, oxide, nitride, or graphene.

16. A device comprising:

a first semiconductor layer formed of a first group III nitride material;

a contact to the first semiconductor layer, wherein an interface between the first semiconductor layer and the contact includes a first roughness profile having a characteristic height between 3 and 20 nanometers and a characteristic width within a range of approximately 0.1 micron to approximately 50 microns; and

an interlayer located between the first semiconductor layer and the contact, wherein the interlayer comprises a plurality of islands each having a closed boundary that is separate from the first semiconductor layer and the contact, wherein at least some of the plurality of islands comprise a metal-based alloy having a work function higher than 4.5 eV and at least some of the plurality of islands comprise a metal that provides an electrical contact having a specific contact resistivity lower than 10<sup>−

4</sup> ohm*cm² to group III nitride materials.

17. The device of claim 16, further comprising a second semiconductor layer located between the first semiconductor layer and the interlayer, wherein the second semiconductor layer comprises a second group III nitride material having a gallium molar fraction greater than 0.8.

18. The device of claim 16, wherein at least some of the plurality of islands comprise graphene.

19. The device of claim 16, wherein at least some of the plurality of islands are formed of an oxide.

20. The device of claim 16, further comprising a plurality of metallic protrusions that extend from the interlayer into the first semiconductor layer.