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Adaptive wear levelling

  • US 10,282,111 B2
  • Filed: 10/21/2016
  • Issued: 05/07/2019
  • Est. Priority Date: 07/29/2016
  • Status: Active Grant
First Claim
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1. A device comprising:

  • at least one processor configured to;

    utilize sets of blocks of flash memory circuits for data storage operations, each of the sets of blocks including at least one block from each of the flash memory circuits and at least some of the blocks of at least some of the sets of blocks being marked active, wherein the at least some of the blocks of the at least some of the sets of blocks that are marked as active are utilized for the data storage operations;

    monitor quality metrics of each block of each of the sets of blocks while the at least some of the blocks of the at least some of the sets of blocks that are marked as active are utilized for the data storage operations;

    determine when the quality metric of one of the blocks of one of the sets of blocks falls below a minimum quality level;

    mark the one of the blocks of the one of the sets of blocks as temporarily inactive, wherein the one of the blocks of the one of the sets of blocks is not utilized for the data storage operations while marked temporarily inactive;

    determine that at least one criterion is satisfied when a number of the blocks of the one of the sets of blocks that are marked as active falls below a minimum number of active blocks for a code rate associated with the one of the sets of blocks, wherein each of the sets of blocks is associated with the code rate; and

    when the at least one criterion is satisfied, mark the one of the blocks of the one of the sets of blocks as active, wherein the one of the blocks of the one of the sets of blocks is again utilized for the data storage operations while marked as active.

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