Thin film transistor having stable threshold voltage and less parasitic capacitance, and display device using the same

• US 10,283,644 B2
• Filed: 06/03/2016
• Issued: 05/07/2019
• Est. Priority Date: 04/11/2013
• Status: Active Grant

• Current Assignee: Japan Display Incorporated
• Original Assignee: Japan Display Incorporated
• Inventors: Suzumura, Isao, Uemura, Norihiro, Noda, Takeshi, Miyake, Hidekazu, Yamaguchi, Yohei
• Primary Examiner(s): Ngo, Huyen
• Application Number:
  US15/172,576
• Publication Number:
  US 20160284867A1
• Time in Patent Office: 1,068 Days
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/133357 Planarisation layers
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/133514 Colour filters
• CPC Class Codes: G02F 1/1337 Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A thin film transistor includes a first oxide semiconductor, a source electrode, a drain electrode, a gate insulating film and a gate electrode. A second oxide semiconductor layer is between the first oxide semiconductor layer and the source electrode. A third oxide semiconductor layer is between the first oxide semiconductor layer and the drain electrode. The content ratio of oxygen/Indium in each of the second semiconductor layer and the third oxide semiconductor layer is equal to or larger than that of the first semiconductor layer. A thickness of each of the second semiconductor layer and the third oxide semiconductor layer is bigger than that of the first semiconductor layer.

Claims

1. A thin film transistor using a first oxide semiconductor layer as a channel layer, the transistor comprising:

a substrate, the first oxide semiconductor layer which is formed on the substrate, a gate insulating film which is formed on the first oxide semiconductor layer, a gate electrode which is formed on the gate insulating film;

a first laminated film which includes a source electrode and a second oxide semiconductor layer, wherein the second oxide semiconductor layer is formed between the source electrode and the first oxide semiconductor layer in a source region; and

a second laminated film which includes a drain electrode and a third oxide semiconductor layer, wherein the third oxide semiconductor layer is formed between the drain electrode and the first oxide semiconductor layer in a drain region;

wherein

the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer include indium and oxygen,

a content ratio of oxygen to indium (O/In) in each of the second oxide semiconductor layer and the third oxide semiconductor layer is equal to or larger than that of the first oxide semiconductor layer, and

a film thickness of each of the second oxide semiconductor layer and the third oxide semiconductor layer is thicker than that of the first oxide semiconductor layer.

2. The thin film transistor according to claim 1,

wherein:

¹¹³In concentration in the second oxide semiconductor layer and in the third oxide semiconductor layer is 0.1 to 1 times compared with that in the first oxide semiconductor layer, and

¹¹⁵In¹⁶O concentration in the second oxide semiconductor layer and in the third oxide semiconductor layer is 1 to 2 times compared with that in the first oxide semiconductor layer.

3. The thin film transistor according to claim 1, wherein the first, the second and the third oxide semiconductor layers further include Zn or Ga.

4. The thin film transistor according to claim 1, wherein a film thickness of the channel layer is in a range of 5 nm to 50 nm.

5. The thin film transistor according to claim 1, wherein

a film thickness of the second oxide semiconductor layer in the source region and a film thickness of the third oxide semiconductor layer in the drain region are in a range of 10 nm to 200 nm.

6. A display device which includes a display unit and a driving circuit unit, the display unit comprising:

a substrate, a first oxide semiconductor layer which is formed on the substrate, a gate insulating film which is formed on the first oxide semiconductor layer, a gate electrode which is formed on the gate insulating film;

a first laminated layer which includes a source electrode and a second oxide semiconductor layer, wherein the second oxide semiconductor layer is formed between the source electrode and the first oxide semiconductor layer in a source region; and

a second laminated layer which includes a drain electrode and a third oxide semiconductor layer, wherein the third oxide semiconductor layer is formed between the drain electrode and the first oxide semiconductor layer in a drain region;

wherein

the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer include indium and oxygen,

a content ratio of oxygen to indium (O/In) in each of the second oxide semiconductor layer and the third oxide semiconductor layer is equal to or larger than that of the first oxide semiconductor layer, and

a film thickness of each of the second oxide semiconductor layer and the third oxide semiconductor layer is thicker than that of the first oxide semiconductor layer.

7. The display device according to claim 6, wherein the display unit includes a liquid crystal layer, an alignment film, a color filter, and a black matrix layer.

8. The display device according to claim 6, wherein a lower film is disposed between the substrate and the first oxide semiconductor layer.