Signal modulator

• US 10,284,289 B1
• Filed: 12/20/2017
• Issued: 05/07/2019
• Est. Priority Date: 12/20/2017
• Status: Active Grant

• Current Assignee: National Chung-Shan Institute of Science and Technology
• Original Assignee: National Chung-Shan Institute of Science and Technology
• Inventors: Chang, Hong-Yeh, Lin, Xiang, Yu, Chien-Te, Chou, Hung-Ting
• Primary Examiner(s): Tran, Dzung D
• Application Number:
  US15/847,967
• Time in Patent Office: 503 Days
• CPC Class Codes: G02F 2203/02 reflective
• CPC Class Codes: H04B 1/00 Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04B 10/071 using a reflected signal, e.g. using optical time domain reflectometers [OTDR]
• CPC Class Codes: H04B 10/5167 Duo-binary; Alternative mark inversion; Phase shaped binary transmission
• CPC Class Codes: H04L 27/2096 Arrangements for directly or externally modulating an optical carrier optical modulation H04B10/503

Abstract

A reflective modulator which comprises a coupler, two diodes and two DC block units. The coupler has an input end used to output an output signal, an output end used to output an output signal, a first load end connected to one of the diodes and a second load end connected to another one of the diodes. The DC block units connect between the diodes and the coupler for DC blocking. A message signal is selectively inputted to both of the two DC block units for operating the state of the two diodes. The two diodes turn on when the message signal is large enough. The two diodes turn off when the message signal is not large enough. The two diodes are implemented by PIN diodes. A BPSK modulator using the reflective modulator and a quadrature modulator using the BPSK modulator is also introduced.

Claims

1. A reflective modulator comprises:

a coupler having an input end, an output end, a first load end and a second load end, the input end being used to receive an input signal, the output end being used to output an output signal;

a first diode;

a second diode;

a first DC (Direct Current) block unit connected between the first diode and the first load end of the coupler for DC blocking; and

a second DC block unit connected between the second diode and the second load end of the coupler for DC blocking;

wherein a message signal is inputted to both of the first and second DC block units for operating the states of the first and second diodes, the first and second diodes turn on when the message signal is large enough, and the first and second diodes turn off when the message signal is not large enough, and the first and second diodes are implemented by PIN diodes.

2. The reflective modulator of claim 1, wherein the first DC block unit includes a first capacitor and a first resistor, the second DC block unit includes a second capacitor and a second resistor, the first capacitor is connected between the first diode and the first load end of the coupler for DC blocking, the first resistor is connected with the first capacitor and the first diode, the second capacitor is connected between the second diode and the second load end of the coupler for DC blocking, and the second resistor is connected with the second capacitor and the second diode.

3. The reflective modulator of claim 1, wherein the input signal is generated from a local oscillator and the output signal is used for radio frequency.

4. A BPSK (Binary Phase Shift Keying) modulator comprises:

a balun having a first conductor, a second conductor, a third conductor and a fourth conductor, the first conductor and the second conductor is connected and used to have equal currents in opposite directions, one end of the third conductor magnetically coupling to the first conductor and another end of the third conductor connecting to ground, one end of the fourth conductor magnetically coupling to the second conductor and another end of the fourth conductor connecting to ground;

a first reflective modulator, wherein a first input end of the first reflective modulator is connected to the third conductor;

a second reflective modulator, wherein a second input end of the second reflective modulator is connected to the fourth conductor; and

a power combiner connected to a first output end of the first reflective modulator and a second output end of the first reflective modulator,

wherein a first message signal is inputted to the first reflective modulator and a second message signal is inputted to the second reflective modulator, and the first message signal and the second message signal are a pair of differential signals;

wherein the first reflective modulator comprises a first coupler, a first diode, a second diode, a first DC (Direct-Current) block unit and a second DC block unit, the first coupler having the first input end, the first output end, a first load end and a second load end, the first DC block unit connecting between the first diode and the first load end of the first coupler for DC blocking, the second DC block unit connected between the second diode and the second load end of the first coupler for DC blocking, the first message signal inputting to both of the first and second DC block units for operating the state of the first and second diodes;

wherein the second reflective modulator comprises a second coupler, a third diode, a fourth diode, a third DC block unit and a fourth DC block unit, the second coupler having the second input end, the second output end, a third load end and a fourth load end, the third DC block unit connecting between the third diode and the third load end of the second coupler for DC blocking, the fourth DC block unit connecting between the fourth diode and the fourth load end of the second coupler for DC blocking, the second message signal inputting to both of the third and fourth DC block units for operating the state of the third and fourth diodes;

wherein the first and second diodes turn on when the first message signal is large enough, and the first and second diodes turn off when the first message signal is not large enough;

wherein the third and fourth diodes turn on when the second message signal is large enough, and the third and fourth diodes turn off when the second message signal is not large enough;

wherein the first, second, third and fourth diodes are implemented by PIN diodes.

5. The BPSK modulator of claim 4, wherein the first DC block unit includes a first capacitor and a first resistor, the second DC block unit includes a second capacitor and a second resistor, the first capacitor is connected between the first diode and the first load end of the first coupler for DC blocking, the first resistor is connected with the first capacitor and the first diode, the second capacitor is connected between the second diode and the second load end of the first coupler for DC blocking, and the second resistor is connected with the second capacitor and the second diode.

6. The BPSK modulator of claim 5, wherein the third DC block unit includes a third capacitor and a third resistor, the fourth DC block unit includes a fourth capacitor and a fourth resistor, the third capacitor is connected between the third diode and the third load end of the second coupler for DC blocking, the third resistor is connected with the third capacitor and the third diode, the fourth capacitor is connected between the fourth diode and the fourth load end of the second coupler for DC blocking, and the fourth resistor is connected with the fourth capacitor and the fourth diode.

7. The BPSK modulator of claim 4, wherein an input signal is generated from a local oscillator and inputted to the balun, and an output signal is outputted from the power combiner and used for radio frequency.

8. The BPSK modulator of claim 4, wherein the BPSK modulator is integrated in a monolithic microwave integrated circuit.

9. A quadrature modulator comprises:

a Wilkinson power divider having a power input end, a first power output end and a second power output end;

a first BPSK (Binary Phase Shift Keying) modulator connected to the first power output end of the Wilkinson power divider;

a second BPSK modulator connected to the second power output end of the Wilkinson power divider, the second BPSK modulator generating a second output signal; and

a Lange coupler connected to the first BPSK modulator and the second BPSK modulator for receiving a first output signal and a second output signal;

wherein a first message signal and a second message signal are inputted to the first BPSK modulator, a third message signal and a fourth message signal are inputted to the second BPSK modulator, the first BPSK modulator generates the first output signal according to the first message signal, the second message signal, and an input from the Wilkinson power divider, and the second BPSK modulator generates the second output signal according to the third message signal, the fourth message signal, and an input from the Wilkinson power divider;

wherein the first BPSK modulator comprises a first balun, a first reflective modulator, a second reflective modulator and a first power combiner, the first balun having a first conductor, a second conductor, a third conductor and a fourth conductor, the first conductor and the second conductor being connected and used to have equal currents in opposite directions, one end of the third conductor magnetically coupling to the first conductor and another end of the third conductor connecting to ground, one end of the fourth conductor magnetically coupling to the second conductor and another end of the fourth conductor connecting to ground, a first input end of the first reflective modulator connecting to the third conductor, a second input end of the second reflective modulator connecting to the fourth conductor, the first power combiner connecting to a first output end of the first reflective modulator and a second output end of the second reflective modulator, the first message signal inputting to the first reflective modulator, the second message signal inputting to the second reflective modulator, the first message signal and the second message signal being a pair of differential signals;

wherein the second BPSK modulator comprises a second balun, a third reflective modulator, a fourth reflective modulator and a second power combiner, the second balun having a fifth conductor, a sixth conductor, a seventh conductor and an eighth conductor, the fifth conductor and the sixth conductor being connected and used to have equal currents in opposite directions, one end of the seventh conductor connecting to the fifth conductor and another end of the seventh conductor connecting to ground, one end of the eighth conductor connecting to the sixth conductor and another end of the eighth conductor connecting to ground, a third input end of the third reflective modulator connecting to the seventh conductor, a fourth input end of the fourth reflective modulator connecting to the eighth conductor, the second power combiner connecting to a third output end of the third reflective modulator and a fourth output end of the fourth reflective modulator, the third message signal inputting to the third reflective modulator, the fourth message signal inputting to the fourth reflective modulator, the third message signal and the fourth message signal being a pair of differential signals;

wherein the first reflective modulator comprises a first coupler, a first diode, a second diode, a first DC (Direct-Current) block unit and a second DC block unit, the first coupler having the first input end, the first output end, a first load end and a second load end, the first diode connecting to the first load end of the first coupler, the second diode connecting to the second load end of the first coupler, the first DC block unit connecting between the first diode and the first load end of the first coupler for DC blocking, the second DC block unit connected between the second diode and the second load end of the first coupler for DC blocking, the first message signal inputting to both of the first and second DC block units for operating the state of the first and second diodes;

wherein the second reflective modulator comprises a second coupler, a third diode, a fourth diode, a third DC block unit and a fourth DC block unit, the second coupler having the second input end, the second output end, a third load end and a fourth load end, the third diode connecting to the third load end of the second coupler, the fourth diode connecting to the fourth load end of the second coupler, the third DC block unit connecting between the third diode and the third load end of the second coupler for DC blocking, the fourth DC block unit connecting between the fourth diode and the fourth load end of the second coupler for DC blocking, the second message signal inputting to both of the third and fourth DC block units for operating the state of the third and fourth diodes;

wherein the third reflective modulator comprises a third coupler, a fifth diode, a sixth diode, a fifth DC block unit and a sixth DC block unit, the third coupler having the third input end, the third output end, a fifth load end and a sixth load end, the fifth diode connecting to the fifth load end of the third coupler, the sixth diode connecting to the sixth load end of the third coupler, the fifth DC block unit connecting between the fifth diode and the fifth load end of the third coupler for DC blocking, the sixth DC block unit connecting between the sixth diode and the sixth load end of the third coupler for DC blocking, the third message signal inputting to both of the fifth and sixth DC block units for operating the state of the fifth and sixth diodes;

wherein the fourth reflective modulator comprises a fourth coupler, a seventh diode, an eighth diode, a seventh DC block unit and an eighth DC block unit, the fourth coupler having the fourth input end, the fourth output end, a seventh load end and a eighth load end, the seventh diode connecting to the seventh load end of the fourth coupler, the eighth diode connecting to the eighth load end of the fourth coupler, the seventh DC block unit connecting between the seventh diode and the seventh load end of the fourth coupler for DC blocking, the eighth DC block unit connecting between the eighth diode and the eighth load end of the fourth coupler for DC blocking, the fourth message signal inputting to both of the seventh and eighth DC block units for operating the state of the seventh and eighth diodes;

wherein the first and second diodes turn on when the first message signal is large enough, and the first and second diodes turn off when the first message signal is not large enough;

wherein the third and fourth diodes turn on when the second message signal is large enough, and the third and fourth diodes turn off when the second message signal is not large enough;

wherein the fifth and sixth diodes turn on when the third message signal is large enough, and the fifth and sixth diodes turn off when the third message signal is not large enough;

wherein the seventh and eighth diodes turn on when the fourth message signal is large enough, and the seventh and eighth diodes turn off when the fourth message signal is not large enough;

wherein the first, second, third, fourth, fifth, sixth, seventh and eighth diodes are implemented by PIN diodes.

10. The quadrature modulator of claim 9,

wherein the first DC block unit includes a first capacitor and a first resistor, the second DC block unit includes a second capacitor and a second resistor, the first capacitor is connected between the first diode and the first load end of the first coupler for DC blocking, the first resistor is connected with the first capacitor and the first diode, the second capacitor is connected between the second diode and the second load end of the first coupler for DC blocking, and the second resistor is connected with the second capacitor and the second diode;

wherein the third DC block unit includes a third capacitor and a third resistor, the fourth DC block unit includes a fourth capacitor and a fourth resistor, the third capacitor is connected between the third diode and the third load end of the second coupler for DC blocking, the third resistor is connected with the third capacitor and the third diode, the fourth capacitor is connected between the fourth diode and the fourth load end of the second coupler for DC blocking, and the fourth resistor is connected with the fourth capacitor and the fourth diode;

wherein the fifth DC block unit includes a fifth capacitor and a fifth resistor, the sixth DC block unit includes a sixth capacitor and a sixth resistor, the fifth capacitor is connected between the fifth diode and the fifth load end of the third coupler for DC blocking, the fifth resistor is connected with the fifth capacitor and the fifth diode, the sixth capacitor is connected between the sixth diode and the sixth load end of the third coupler for DC blocking, and the sixth resistor is connected with the sixth capacitor and the sixth diode; and

wherein the seventh DC block unit includes a seventh capacitor and a seventh resistor, the eighth DC block unit includes a eighth capacitor and a eighth resistor, the seventh capacitor is connected between the seventh diode and the seventh load end of the fourth coupler for DC blocking, the seventh resistor is connected with the seventh capacitor and the seventh diode, the eighth capacitor is connected between the eighth diode and the eighth load end of the fourth coupler for DC blocking, and the eighth resistor is connected with the eighth capacitor and the eighth diode.

11. The quadrature modulator of claim 9, wherein an input signal inputted to the power input end of Wilkinson power divider is generated from a local oscillator, and an output signal is outputted from the Lange coupler and used for radio frequency.

12. The quadrature modulator of claim 9, wherein the quadrature modulator is integrated in a monolithic microwave integrated circuit.