System and method for concurrent address allocation and authentication
First Claim
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1. A method for coordinating network entry of a device, the method comprising:
- authenticating, by a controller, in a first process, the device coupled to the controller;
allocating, by the controller, in a second process, an address for the device, the first process performed independently of the second processes, and the first process performed in parallel with the second process; and
completing, by the controller, the network entry of the device upon successful completion of authenticating the device and allocating the address for the device.
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Abstract
A method for coordinating network entry of a device includes authenticating the device coupled to the controller, and allocating an address for the device, wherein allocating the address for the device occur concurrently with but independently of authenticating the device. The method also includes completing the network entry of the device upon successful completion of authenticating the device and allocating the address for the device.
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Citations
22 Claims
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1. A method for coordinating network entry of a device, the method comprising:
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authenticating, by a controller, in a first process, the device coupled to the controller; allocating, by the controller, in a second process, an address for the device, the first process performed independently of the second processes, and the first process performed in parallel with the second process; and completing, by the controller, the network entry of the device upon successful completion of authenticating the device and allocating the address for the device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for coordinating network entry of a device, the method comprises:
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receiving, by a controller, an authentication request message in a single time instance from the device; receiving, by the controller, an address assignment request message in the single time instance from the device; processing, by the controller, the authentication request message; processing, by the controller, the address assignment request message independently of processing of the authentication request message, and the processing of the address assignment request message is performed in parallel with the processing of the authentication request message; and enabling, by the controller, data traffic upon successful completion of processing of the authentication request message and processing of the address assignment request message. - View Dependent Claims (10, 11, 12)
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13. A controller comprising:
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a processor; and a non-transitory computer readable storage medium storing programming for execution by the processor, the programming including instructions to; authenticate a device coupled to the controller, allocate an address for the device, wherein the instructions to authenticate the device are performed in parallel with and independently of the instructions to allocate the address, and complete a network entry of the device upon successful completion of authenticating the device and allocating the address for the device. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A controller comprising:
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a receiver configured to receive an authentication request message in a single time instance from a device, and to receive an address assignment request message in the single time instance from the device; and a processor operatively coupled to the receiver; and a non-transitory computer readable storage medium storing programming for execution by the processor, the programming including instructions to; operate on the authentication request message, operate on the address assignment request message, wherein the instructions to operate on the authentication request message are performed in parallel with and independently of the instructions to operate on the address assignment request message, and enable data traffic upon successful completion of processing of the authentication request message and processing of the address assignment request message. - View Dependent Claims (20, 21, 22)
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Specification