System and method for testing an integrated circuit

• US 10,288,669 B2
• Filed: 02/08/2017
• Issued: 05/14/2019
• Est. Priority Date: 05/16/2012
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Ilkov, Nikolay, Bakalski, Winfried
• Primary Examiner(s): Nguyen, Vincent Q
• Assistant Examiner(s): Nguyen, Trung
• Application Number:
  US15/427,939
• Publication Number:
  US 20170146590A1
• Time in Patent Office: 825 Days
• Field of Search: 324500, 324600, 32476401, 324522, 324713, 324 7611, 324 7639, 32476201-76302, 324527-535, 32475015-75019, 32475601-75702, 324409-433, 324536, 324678, 327379, 327564, 327551, 327558, 327565
• CPC Class Codes: G01R 31/2621 for testing field effect transistors, i.e. FET's
• CPC Class Codes: G01R 31/2822 of microwave or radiofrequency circuits of attenuation, gain, e.g. using network analyzers G01R27/28

Abstract

In accordance with an embodiment, a method of testing an integrated circuit, includes receiving a supply voltage on the integrated circuit via a first input pin, providing power to circuits disposed on the integrated circuit via the first input pin, comparing the supply voltage to an internally generated voltage, generating a digital output value based on the comparing, and applying the digital output value to a pin of the integrated circuit.

Claims

1. A method of testing a MOS switch, the method comprising:

pumping a substrate of the MOS switch to a negative voltage, wherein the MOS switch comprises a switching transistor, and wherein pumping the substrate to the negative voltage causes an output node of the MOS switch to be pulled to a first negative voltage in case of a device failure;

lowpass filtering a voltage of the output node of the MOS switch, lowpass filtering including using a lowpass filter comprising a resistor coupled between the output node of the MOS switch and a first input of a comparator and a capacitor coupled to a ground node;

after lowpass filtering, comparing the filtered voltage of the output node of the MOS switch to a reference voltage while pumping the substrate, wherein comparing the voltage of the output node of the MOS switch to the reference voltage comprises using the comparator; and

indicating a failed test condition if the voltage of the output node of the MOS switch is less than the reference voltage based on the comparing, wherein indicating the failed test condition comprises monitoring the output of the comparator using a digital interface circuit.

2. The method of claim 1, wherein the substrate of the MOS switch comprises a well disposed in a semiconductor substrate.

3. The method of claim 1, wherein pumping the substrate to the negative voltage comprises using a charge pump.

4. The method of claim 1, wherein the reference voltage is a ground voltage.

5. The method of claim 1, further comprising lowpass filtering the voltage of the output node of the MOS switch before comparing.

6. A system for testing a MOS switch, the system comprising:

a charge pump configured to pump a substrate of the MOS switch to a negative voltage, wherein the MOS switch comprises a switching transistor, and wherein pumping the substrate to the negative voltage causes an output node of the MOS switch to be pulled to a first negative voltage in case of a device failure;

a first comparator having a first input coupled to the output node of the MOS switch and a second input configured to receive a first reference voltage;

a digital interface circuit coupled to an output of the first comparator, the digital interface circuit configured to indicate a first failed test condition when the first comparator indicates that a voltage of the output node of the MOS switch is less than the first reference voltage; and

a lowpass filter coupled between the output node of the MOS switch and the first input of the first comparator, wherein the lowpass filter comprises a resistor coupled between the output node of the MOS switch and the first input of the first comparator and a capacitor coupled to a ground node.

7. The system of claim 6, wherein the first reference voltage is a ground voltage.

8. The system of claim 6, wherein the substrate of the MOS switch comprises a well disposed in a semiconductor substrate.

9. A system for testing a MOS switch, the system comprising:

a charge pump configured to pump a substrate of the MOS switch to a negative voltage;

a first comparator having a first input coupled to an output node of the MOS switch and a second input configured to receive a first reference voltage;

a digital interface circuit coupled to an output of the first comparator, the digital interface circuit configured to indicate a first failed test condition when the first comparator indicates that a voltage of the output node of the MOS switch is less than the first reference voltage;

a voltage regulator having a voltage reference output coupled to an input of the charge pump;

a voltage divider coupled between the voltage reference output and a reference node; and

a second comparator having a first input coupled to an output of the voltage divider, a second input configured to receive a second reference voltage, and an output coupled to the digital interface circuit.

10. An integrated switch system comprising:

a voltage regulator;

a digital interface;

a power supply input;

a charge pump;

an RF switch; and

a measurement interface circuit comprising a comparator having a first input coupled to the power supply input, a second input coupled to a parameter measurement node, and an output coupled to the digital interface wherein the first input of the comparator is coupled to the power supply input via a voltage divider, and at least one of (a), (b), (c) or (d) as follows;

a) the second input of the comparator is coupled to a feedback node of the voltage regulator, or

b) the measurement interface circuit further comprises a first current measurement circuit coupled in series with an output of the voltage regulator, and the second input of the comparator is coupled to the first current measurement circuit, or

c) the measurement interface circuit further comprises a second current measurement circuit coupled in series with an output of the charge pump and a substrate connection of the RF switch, or

d) the second input of the comparator is coupled to a second voltage divider coupled between an output of the charge pump of the power supply input.

11. The integrated switch system of claim 10, wherein the digital interface comprises a serial interface.

12. The integrated switch system of claim 10, wherein the RF switch comprises a plurality of RF switches.

13. The integrated switch system of claim 10, wherein:

the second input of the comparator is coupled to the feedback node of the voltage regulator.

14. The integrated switch system of claim 10, wherein:

the measurement interface circuit further comprises the first current measurement circuit coupled in series with an output of the voltage regulator; and

the second input of the comparator is coupled to the first current measurement circuit.

15. The integrated switch system of claim 14, wherein the first current measurement circuit comprises:

a resistor coupled in series with an output of the voltage regulator; and

an amplifier having a positive input coupled to a first terminal of the resistor, a negative input coupled to a second terminal of the resistor and an output coupled to the second input of the comparator.

16. The integrated switch system of claim 10, wherein:

the measurement interface circuit further comprises the first current measurement circuit coupled in series with an output of the charge pump and the substrate connection of the RF switch.

17. The integrated switch system of claim 10, wherein:

the second input of the comparator is coupled to second voltage divider coupled between the output of the charge pump of the power supply input.