Systems and methods for dimming control using system controllers

• US 10,292,217 B2
• Filed: 12/07/2016
• Issued: 05/14/2019
• Est. Priority Date: 05/11/2011
• Status: Active Grant

• Current Assignee: On-Bright Electronics (Shanghai) Co., Ltd. (Orthosie Investment Holdings Ltd.)
• Original Assignee: On-Bright Electronics (Shanghai) Co., Ltd. (Orthosie Investment Holdings Ltd.)
• Inventors: Zhu, Liqiang, Zhou, Jun, Fang, Lieyi
• Primary Examiner(s): Hammond, Dedei K
• Application Number:
  US15/372,324
• Publication Number:
  US 20170181235A1
• Time in Patent Office: 888 Days
• Field of Search: None
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 45/375 using buck topology
• CPC Class Codes: H05B 45/385 using flyback topology

Abstract

System and method for dimming control. The system includes a system controller, a transistor, and a resistor. The system controller includes a first controller terminal and a second controller terminal. The transistor includes a first transistor terminal, a second transistor terminal and a third transistor terminal. The resistor including a first resistor terminal and a second resistor terminal. The first transistor terminal is coupled, directly or indirectly, to the second controller terminal. The first resistor terminal is coupled to the second transistor terminal. The second resistor terminal is coupled to the third transistor terminal. The system controller is configured to receive an input signal at the first controller terminal and to generate an output signal at the second controller terminal. The transistor is configured to receive the output signal at the first transistor terminal and to change between a first condition and a second condition.

Claims

1. A system for dimming control, the system comprising:

a system controller;

wherein the system controller includes;

a first controller terminal; and

a second controller terminal;

wherein;

a second transistor terminal of a transistor is coupled to a first resistor terminal of a first resistor, the transistor further including a first transistor terminal and a third transistor terminal, the first resistor further including a second resistor terminal; and

the second resistor terminal is coupled to the third transistor terminal;

wherein;

the system controller is configured to receive an input signal at the first controller terminal and to generate an output signal at the second controller terminal based at least in part on the input signal; and

the system controller is further configured to, in response to the input signal becoming larger in magnitude than a threshold signal, change the output signal after a delay in order to change the transistor from a first condition to a second condition;

wherein the transistor is configured to receive the output signal at the first transistor terminal and to change between the first condition and the second condition based at least in part on the output signal.

2. The system of claim 1 wherein the transistor is configured to be turned off under the first condition and be turned on under the second condition.

3. The system of claim 1, and further comprising:

a second resistor including a third resistor terminal and a fourth resistor terminal;

wherein;

the first transistor terminal is coupled to the third resistor terminal; and

the second controller terminal is coupled to the fourth resistor terminal.

4. The system of claim 3 wherein the first transistor terminal is coupled indirectly to the third resistor terminal.

5. The system of claim 3 wherein the second controller terminal is coupled indirectly to the fourth resistor terminal.

6. The system of claim 1 wherein the input signal is generated by a voltage divider.

7. The system of claim 6 wherein the voltage divider includes a third resistor and a fourth resistor.

8. The system of claim 1 wherein the third transistor terminal is biased at a first voltage.

9. The system of claim 1 wherein the second controller terminal is coupled indirectly to the first transistor terminal.

10. The system of claim 1 wherein the second transistor terminal is coupled indirectly to the first resistor terminal.

11. The system of claim 1 wherein the second resistor terminal is coupled indirectly to the third transistor terminal.

12. A method for dimming control, the method comprising:

receiving an input signal;

processing the input signal;

generating an output signal based at least in part on the input signal in order to change a transistor between a first condition and a second condition, the transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal; and

in response to the input signal becoming larger in magnitude than a threshold signal, changing the output signal after a delay in order to change the transistor from the first condition to the second condition and to short a resistor by the transistor in the second condition, the resistor including a first resistor terminal and a second resistor terminal, the second transistor terminal being coupled to the first resistor terminal, the second resistor terminal being coupled to the third transistor terminal.

13. The method of claim 12, and further comprising:

turning off the transistor under the first condition; and

turning on the transistor under the second condition.

14. The method of claim 12, and further comprising:

generating the input signal by a voltage divider.

15. The method of claim 12 wherein the third transistor terminal is biased at a first voltage.

16. The method of claim 12 wherein the second transistor terminal is coupled indirectly to the first resistor terminal.

17. The method of claim 12 wherein the second resistor terminal is coupled indirectly to the third transistor terminal.