Micro LED display

• US 10,297,712 B2
• Filed: 06/23/2014
• Issued: 05/21/2019
• Est. Priority Date: 11/18/2011
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Bibl, Andreas, Higginson, John A., Law, Hung-Fai Stephen, Hu, Hsin-Hua
• Primary Examiner(s): Nadav, Ori
• Application Number:
  US14/312,554
• Publication Number:
  US 20140299837A1
• Time in Patent Office: 1,793 Days
• Field of Search: 257 13, 257 14, 257 88- 97
• CPC Class Codes: F21V 7/00 Reflectors for light sources characterised by cooling arrangements F21V29/505
• CPC Class Codes: H01L 2224/95 at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 29/0684 characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/04 with a quantum effect structure or superlattice, e.g. tunnel junction
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/28 containing only elements of Group II and Group VI of the Periodic Table
• CPC Class Codes: H01L 33/30 containing only elements of Group III and Group V of the Periodic Table

Abstract

A micro light emitting diode (LED) and a method of forming an array of micro LEDs for transfer to a receiving substrate are described. The micro LED structure may include a micro p-n diode and a metallization layer, with the metallization layer between the micro p-n diode and a bonding layer. A conformal dielectric barrier layer may span sidewalls of the micro p-n diode. The micro LED structure and micro LED array may be picked up and transferred to a receiving substrate.

Claims

1. A display substrate comprising:

a plurality of separate micro LED devices bonded to a corresponding plurality of separate driver contacts; and

a common contact line formed of a transparent material directly over and in electrical contact with a top surface of each of the plurality of separate micro LED devices, wherein each of the plurality of separate micro LED devices comprises;

a p-n diode including;

a bottom surface directly beneath the top surface;

a p-doped layer;

an n-doped layer; and

a quantum well layer between the n-doped layer and the p-doped layer;

wherein the p-n diode is less than 3 μ

m thick and less than 10 μ

m wide; and

a lower metallization layer including a top surface and a bottom surface, wherein the top surface of the lower metallization layer is underneath the bottom surface of the p-n diode, and the bottom surface of the lower metallization layer is directly over and bonded to a corresponding driver contact;

wherein a maximum thickness between the top surface of the p-n diode and the bottom surface of the lower metallization layer is less than 5 μ

m.

2. The display substrate of claim 1, wherein the common contact line comprises indium tin oxide.

3. The display substrate of claim 1, further comprising a plurality of separate bonding layers, wherein each lower metallization layer is bonded to a corresponding driver contact with a corresponding bonding layer.

4. The display substrate of claim 3, wherein each bonding layer comprises indium.

5. The display substrate of claim 1, wherein each p-n diode has a square configuration with tapered corners.

6. The display substrate of claim 1, further comprising a plurality of dielectric barrier layers, wherein each dielectric barrier layer spans sidewalls of a corresponding p-n diode.

7. The display substrate of claim 6, wherein each dielectric barrier layer covers the quantum well layer of a corresponding p-n diode.

8. The display substrate of claim 7, wherein common contact line is on each dielectric barrier layer, such that each dielectric barrier layer electrically insulates a corresponding quantum well from the common contact line.

9. The display substrate of claim 8, wherein the plurality of separate micro LED devices are arranged in a pixel group.

10. The display substrate of claim 9, wherein the pixel group includes a red-emitting micro LED device, a green-emitting micro LED device, and a blue-emitting micro LED device.

11. The display substrate of claim 1, wherein the p-doped layer is thinner than the n-doped layer.

12. The display substrate of claim 1, wherein the p-n diode comprises an inorganic II-VI or III-V semiconductor.

13. The display substrate of claim 1, wherein the top and bottom surface of each p-n diode are concentric.

14. The display substrate of claim 13, wherein the top and bottom surface of each p-n diode are parallel.

15. The display substrate of claim 14, wherein the top surface of each p-n diode is planar.

16. The display substrate of claim 15, wherein the bottom surface of each p-n diode is wider than a corresponding lower metallization layer.

17. The display substrate of claim 13, wherein the bottom surface of each p-n diode is wider than a corresponding lower metallization layer.

18. The display substrate of claim 1, wherein the plurality of separate micro LED devices are arranged in a pixel group.

19. The display substrate of claim 1, wherein the plurality of separate micro LED devices are arranged in a pixel group.

20. The display substrate of claim 19, wherein the pixel group includes micro LED devices that are designed to emit different colors.