Method and device for determining toggle sequence and error pattern based on soft decision

• US 10,298,360 B2
• Filed: 02/17/2015
• Issued: 05/21/2019
• Est. Priority Date: 02/17/2014
• Status: Active Grant

• Current Assignee: Yonsei University
• Original Assignee: Yonsei University
• Inventors: Kim, Jae Kwon, Yun, Ju Hee, Kim, Nu Li Byul
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Ahmed, Enam
• Application Number:
  US14/765,288
• Publication Number:
  US 20160269148A1
• Time in Patent Office: 1,554 Days
• Field of Search: 714776
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0047 Decoding adapted to other signal detection operation in conjunction with sequence estimation or equalization H04L25/03286
• CPC Class Codes: H04L 1/0061 Error detection codes
• CPC Class Codes: H04L 1/1864 ARQ related signaling H04L1/1607 takes precedence
• CPC Class Codes: H04L 1/1867 Arrangements specially adapted for the transmitter end

Abstract

Provided is a method of determining a toggle sequence for error detection based on a soft decision value and a method and apparatus for determining an error pattern, and more particularly, to a method of determining an optimum toggle sequence and error pattern based on a soft decision value in order to allow for faster error (pattern) detection and correction. It is an object of the invention to implement low redundancy, less delay, and a receive-side error correction capability by combining advantages of the conventional ARQ scheme and the conventional FEC scheme using a soft decision reliability. For this purpose, according to a first embodiment of the present invention, in order to optimize the toggle sequence speed, there is provided a method of determining a toggle sequence such that bits are toggled sequentially in the order of a smaller sum of soft decision reliabilities to be toggled.

Claims

1. A method of determining an optimum toggle sequence in data transmission depending on a reliability of a soft decision bit stream generated by a soft decision bit stream generation circuit for a received signal, the method comprising processes of:

setting a fundamental toggle sequence (SEQ) group by a toggling circuit; and

determining the optimum toggle sequence to increase an error detection and correction speed in the data transmission by the toggling circuit such that bits are toggled sequentially on a smaller sum basis of soft decision reliabilities to be toggled using the fundamental toggle sequence group, wherein toggling the bit sequentially on the smaller sum basis of the soft decision reliabilities includes toggling first a bit having a higher probability than another bit having a lower probability,

wherein the fundamental toggle sequence (SEQ) group is determined based on the following equation;

2. The method according to claim 1, wherein the process of determining the optimum toggle sequence includes a process of determining a sorting completion pointer (CRC_ptr) out of the fundamental toggle sequence group (SEQ) based on the following equation:

CRC_ptr←

find(SEQ=2<sup>s−

1</sup>).

3. The method according to claim 2, further comprising a process of detecting and checking an error whenever toggling is performed sequentially until the toggle sequence indicated by the sorting completion pointer (CRC_ptr),

wherein the received signal includes an error detection bit.

4. The method according to claim 2, further comprising a process of determining a next sequence by determining a next toggle sequence group (SEQ^temp) from the fundamental toggle sequence group (SEQ) based on the following equation:

SEQ^temp←

SEQ+2<sup>s−

1</sup>.

5. The method according to claim 4, wherein the process of determining the optimum toggle sequence includes a process of determining a sorting range indicator (l_pos) out of the next toggle sequence group (SEQ^temp) based on the following equation:

6. The method according to claim 5, wherein the process of determining the optimum toggle sequence includes a process of sorting unidentified sequences on a smaller sum-of-reliabilities basis by calculating a sum of the reliabilities for each sequence ranging from the sequence (CRC_ptr+1) next to that indicated by the sorting completion pointer to the sequence (l_pos−

1) preceding the sorting range indicator.

7. The method according to claim 4, wherein the process of determining the next sequence includes a process of repeatedly determining the next sequence by determining the next toggle sequence group (SEQtemp′

) by combining the fundamental toggle sequence group (SEQ) and the next toggle sequence group (SEQtemp) into a next fundamental toggle sequence group (SEQ′

) and incrementing “

s”

.

8. The method according to claim 7, wherein, in the process of determining the next sequence, the next toggle sequence group is determined by reflecting a sequence sorted through the process of sorting unidentified sequences.

9. The method according to claim 7, wherein the process of determining the next sequence includes a process of updating the sorting completion pointer (CRC_ptr) by adding “

1”

to “

s”

.

10. The method according to claim 1, further comprising a process of detecting and checking an error whenever toggling is performed,

wherein the received signal includes an error detection bit.

11. The method according to claim 10, wherein the error detection bit is a cyclic redundancy check (CRC) bit.