Method and system for implementing high-speed electrical interfaces between semiconductor dies in optical communication systems
First Claim
1. A method for processing signals, the method comprising:
- in a communication system, communicating electrical signals between a first die and a second die via coupling pads on said first die and said second die, wherein said coupling pads are located at low impedance points between two transistors in one or more transmit paths and/or one or more receive paths in said communication system, wherein a first of said two transistors is integrated in said first die and a second of said two transistors is integrated in said second die.
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Abstract
A method and system for implementing high-speed electrical interfaces between semiconductor dies in optical communication systems are disclosed and may include communicating electrical signals between a first die and a second die via coupling pads which may be located in low impedance points in Tx and Rx paths. The electrical signals may be communicated via one or more current-mode, controlled impedance, and/or capacitively-coupled interfaces. The current-mode interface may include a cascode amplifier stage split between source and drain terminals of transistors on the dies. The controlled-impedance interfaces may include transmission line drivers on a first die and transmission lines on a second die. The capacitively-coupled interfaces may include capacitors formed by contact pads on the dies. The coupling pads may be connected via one or more of: wire bonds, metal pillars, solder balls, or conductive resin. The dies may comprise CMOS and may be coupled in a flip-chip configuration.
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Citations
26 Claims
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1. A method for processing signals, the method comprising:
in a communication system, communicating electrical signals between a first die and a second die via coupling pads on said first die and said second die, wherein said coupling pads are located at low impedance points between two transistors in one or more transmit paths and/or one or more receive paths in said communication system, wherein a first of said two transistors is integrated in said first die and a second of said two transistors is integrated in said second die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A system for processing signals, the system comprising:
a communication system comprising a first die and a second die, said first die and said second die comprising circuitry that is operable to communicate electrical signals between said first die and said second die via coupling pads on said first die and said second die, wherein said coupling pads are located at low impedance points between two transistors in one or more transmit paths and/or one or more receive paths in said communication system, wherein a first of said two transistors is integrated in said first die and a second of said two transistors is integrated in said second die. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
Specification