Method, system, and device for monitoring operations of a system asset

• US 10,303,162 B2
• Filed: 04/20/2018
• Issued: 05/28/2019
• Est. Priority Date: 10/31/2012
• Status: Active Grant

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Williams, Scott Terrell
• Primary Examiner(s): Mackall, Larry T
• Application Number:
  US15/958,863
• Publication Number:
  US 20180239346A1
• Time in Patent Office: 403 Days
• CPC Class Codes: G05B 23/0221 Preprocessing measurements, e.g. data collection rate adjustment; Standardization of measurements; Time series or signal analysis, e.g. frequency analysis or wavelets; Trustworthiness of measurements; Indexes therefor; Measurements using easily measured parameters to estimate parameters difficult to measure; Virtual sensor creation; De-noising; Sensor fusion; Unconventional preprocessing inherently present in specific fault detection methods like PCA-based methods

Abstract

A device for use in monitoring operation of a system asset includes an interface for receiving sensor data representative of an operating condition of the system asset, a memory device for storing the sensor data, and a processor coupled to the interface and to the memory device. The processor is configured to create a hierarchy of sensor data within the memory device, wherein the hierarchy comprises a first tier and a second tier, store a first level of the sensor data in the first tier, and store a second level of the sensor data in the second tier.

Claims

1. A device for use in monitoring operation of a system asset, said device comprising:

an interface for receiving sensor data representative of an operating condition of a system asset being monitored;

a memory device for storing the sensor data; and

a processor coupled to said interface and to said memory device, said processor configured to;

create a hierarchy of sensor data within said memory device, wherein the hierarchy includes a first tier and a second tier;

store a first level of the sensor data in the first tier, the first level of the sensor data including a plurality of samples, each sample including a value of a measured operating condition of the monitored system asset, a status of the sensor data, and a time stamp indicative of a time of receipt of the sensor data by the processor wherein the status of the sensor data is represented by a status data structure in which a bit is set based on a detected status event associated with the status bit;

generate a second level of the sensor data including a plurality of second level summaries, each second level summary including,

a second level status compilation combining the status of each sample received by the processor during respective predetermined time periods according to a bitwise logical OR of the bits of each status data structure of each sample; and

at least one second level statistical abstract of samples received by the processor during the respective predetermined time periods; and

store the second level of the sensor data in the second tier.

2. The device of claim 1, wherein said processor is further configured to:

receive the plurality of samples from said interface in real time;

generate each sensor data status and

store the plurality of samples in the first level of sensor data in real-time.

3. The device of claim 1, further comprising:

a data acquisition device comprising the interface; and

a display device coupled to said data acquisition device, said display device configured to display data representative of the second level of the sensor data.

4. The device of claim 1, wherein the hierarchy includes a third tier and the processor is configured to store a third level of the sensor data in the third tier, the third level including at least one third level summary including a third level status compilation of the second level status compilations of least two second level summaries and at least one third level statistical abstract of the second level statistical abstracts of the at least two second level summaries.

5. The device of claim 4, wherein the third level status compilation is a bitwise logical OR of the bits of the second level status compilations of the at least two second level status compilations.

6. A method of monitoring a system asset, said method comprising:

creating a hierarchy of sensor data within a memory device, wherein the hierarchy includes a first tier and a second tier;

receiving sensor data representative of an operating condition of a system asset being monitored;

storing a first level of the sensor data in the first tier, the first level including a plurality of samples, each sample including a value of a measured operating condition of the monitored system asset, a status of the sensor data, and a time stamp indicative of a time of receipt of the sensor data;

generating a second level of the sensor data including a plurality of second level summaries, each second level summary including a second level status compilation combining the status of each sample received during respective predetermined time periods according to a bitwise logical OR of the bits of each status data structure of each sample, and at least one second level statistical abstract of samples received during the respective predetermined time periods;

storing the second level of the sensor data in the second tier; and

displaying data representative of the second level of the sensor data on a display device.

7. The method of claim 6, wherein receiving sensor data comprises receiving real-time samples of sensor data from a sensor interface.

8. The method of claim 6, wherein the hierarchy includes a third tier and the method further comprises storing a third level of the sensor data in the third tier, the third level including at least one third level summary including a third level status compilation of the second level status compilations of least two second level summaries and at least one third level statistical abstract of the second level statistical abstracts of the at least two second level summaries.

9. The method of claim 8, wherein the third level status compilation is a bitwise logical OR of the bits of the second level status compilations of the at least two second level status compilations.