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Semiconductor device, semiconductor system and method for operating semiconductor device

  • US 10,303,203 B2
  • Filed: 01/25/2017
  • Issued: 05/28/2019
  • Est. Priority Date: 01/25/2016
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a first clock control circuit which controls a first child clock source to receive a clock signal from a parent clock source;

    a first channel management circuit which transmits a first clock request to the first clock control circuit in response to a first intellectual property (IP) block clock request received from a first IP block;

    a second clock control circuit which controls a second child clock source to receive the clock signal from the parent clock source;

    a second channel management circuit which transmits a second clock request to the second clock control circuit in response to a second IP block clock request received from a second IP block; and

    a power management unit (PMU) which transmits a power control command to the first channel management circuit and the second channel management circuit to control a power state of the first IP block and the second IP block,wherein the first channel management circuit transmits a third clock request to the second channel management circuit and the second channel management circuit transmits an acknowledgement of receipt of the third clock request to the first channel management circuit, to maintain a master-slave relationship.

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