Electronic device package and fabricating method thereof

• US 10,304,890 B2
• Filed: 11/28/2017
• Issued: 05/28/2019
• Est. Priority Date: 11/20/2012
• Status: Active Grant

• Current Assignee: Amkor Technology Singapore Holding Pte., Ltd. (Amkor Technology Incorporated)
• Original Assignee: Amkor Technology Incorporated
• Inventors: Kim, Jin Young, Park, No Sun, Kim, Yoon Joo, Lee, Seung Jae, Cha, Se Woong, Kim, Sung Kyu, Yoon, Ju Hoon
• Primary Examiner(s): Mandala, Victor A
• Application Number:
  US15/823,987
• Publication Number:
  US 20180083061A1
• Time in Patent Office: 546 Days
• CPC Class Codes: G06V 40/12 Fingerprints or palmprints
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/211 Disposition
• CPC Class Codes: H01L 2224/214 Connecting portions
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14678 Contact-type imagers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/18162 of a chip with build-up interconnect

Abstract

Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 μm or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.

Claims

1. A sensor device comprising:

a semiconductor die comprising a first die side, a second die side opposite the first die side, and lateral die sides extending between the first and second die sides, where the first die side comprises sensor circuitry and a bond pad;

a surrounding structure that laterally surrounds at least the lateral die sides, wherein the surrounding structure comprises first dielectric material (DM1) that comprises a first DM1 side, a second DM1 side, and lateral DM1 sides extending between the first and second DM1 sides;

a conductive via structure passing through at least the first dielectric material between the first DM1 side and the second DM1 side;

a first conductive layer extending over at least a portion of the first die side and over at least a portion of the first DM1 side, and coupled to the bond pad and to a first via end of the conductive via structure;

a second conductive layer coupled to a second end of the conductive via structure; and

a first dielectric layer that covers the first die side and the first DM1 side, wherein the first dielectric layer comprises;

a first aperture that extends vertically completely through the first dielectric layer and through which the first conductive layer is coupled to the bond pad; and

a second aperture that extends vertically completely through the first dielectric layer and through which the first conductive layer is coupled to the first via end.

2. The sensor device of claim 1, wherein the conductive via structure comprises a continuous layer of a metal that is vertically taller than the semiconductor die.

3. The sensor device of claim 1, comprising a second dielectric layer that covers at least a portion of the each of the first conductive layer and the first dielectric layer.

4. The sensor device of claim 3, wherein each of the first and second dielectric layers completely vertically covers the sensor circuitry.

5. The sensor device of claim 1, wherein the surrounding structure comprises a second dielectric material that covers the second die side and the second DM1 side.

6. The sensor device of claim 5, comprising a conductive ball coupled to the second conductive layer through an aperture that extends vertically completely through the second dielectric material.

7. The sensor device of claim 1, wherein the first dielectric material (DM1) directly contacts at least one of the lateral die sides.

8. The sensor device of claim 1, wherein the conductive via structure comprises a cylindrical copper column.

9. The sensor device of claim 8, wherein the first dielectric material of the surrounding structure directly contacts the cylindrical copper column.

10. The sensor device of claim 1, wherein the first conductive layer is directly connected to the bond pad and to the first via end.

11. The sensor device of claim 1, wherein the first dielectric material of the surrounding structure comprises a molding compound.

12. The sensor device of claim 1, wherein the sensor circuitry comprises image sensing circuitry.

13. The sensor device of claim 1, wherein first die side and the first DM1 side are generally coplanar.

14. A sensor device comprising:

a semiconductor die comprising a first die side, a second die side opposite the first die side, and lateral die sides extending between the first and second die sides, where the first die side comprises sensor circuitry and a bond pad;

a surrounding structure that laterally surrounds at least the lateral die sides, wherein the surrounding structure comprises first dielectric material (DM1) that comprises a first DM1 side, a second DM1 side, and lateral DM1 sides extending between the first and second DM1 sides;

a conductive via structure passing through at least the first dielectric material between the first DM1 side and the second DM1 side;

a first conductive layer extending over at least a portion of the first die side and over at least a portion of the first DM1 side, and coupled to the bond pad and to a first via end of the conductive via structure;

a second conductive layer extending over at least a portion of the second DM1 side, and coupled to a second end of the conductive via structure;

a first dielectric layer that vertically covers at least the first DM1 side and completely vertically covers the sensor circuitry; and

a second dielectric layer that vertically covers at least the first dielectric layer, the first DM1 side, and the first conductive layer.

15. The sensor device of claim 14, wherein the semiconductor die is rectangular shaped with a first and second of the lateral die sides longer than a third and fourth of the lateral die sides.

16. The sensor device of claim 14, wherein the first conductive layer extends from the bond pad toward one of the lateral die sides and past the first via end, but does not extend entirely to any of the lateral DM1 sides.

17. The sensor device of claim 14, wherein:

the first dielectric layer comprises a first aperture through which the first conductive layer is coupled to the bond pad and a second aperture through which the first conductive layer is coupled to the first via end; and

the second dielectric layer completely vertically covers the sensor circuitry.

18. The sensor device of claim 14, wherein the second conductive layer extends over at least a portion of the second die side.

19. A sensor device comprising:

a semiconductor die comprising a first die side, a second die side opposite the first die side, and lateral die sides extending between the first and second die sides, where the first die side comprises sensor circuitry and a bond pad;

a surrounding structure that laterally surrounds at least the lateral die sides, wherein the surrounding structure comprises a first dielectric material that comprises a first DM1 side, a second DM1 side, and lateral DM1 sides extending between the first and second DM1 sides;

a conductive via structure passing through at least the first dielectric material between the first DM1 side and the second DM1 side;

a first conductive layer extending over at least a portion of the first die side and over at least a portion of the first DM1 side, and coupled to the bond pad and to a first via end of the conductive via structure;

a second conductive layer extending over at least a portion of the second DM1 side, and coupled to a second end of the conductive via structure; and

a first conductive trace,

wherein;

the first conductive trace runs in a plane that is parallel to the first die side and separated from the first die side; and

the first conductive trace runs alongside a first of the lateral die sides along at least most of the length of the first of the lateral die sides.

20. A method of making a sensor device, the method comprising:

providing a semiconductor die comprising a first die side, a second die side opposite the first die side, and lateral die sides extending between the first and second die sides, where the first die side comprises sensor circuitry and a bond pad;

laterally surrounding at least the lateral die sides with a surrounding structure that comprises first dielectric material (DM1), wherein the first dielectric material comprises a first DM1 side, a second DM1 side, and lateral DM1 sides extending between the first and second DM1 sides, and wherein a conductive via structure passes through at least the first dielectric material between the first DM1 side and the second DM1 side;

forming a first conductive layer extending over at least a portion of the first die side and over at least a portion of the first DM1 side, and coupled to the bond pad and to a first via end of the conductive via structure;

forming a second conductive layer coupled to a second end of the conductive via structure; and

forming a first dielectric layer that covers the first die side and the first DM1 side, wherein the first dielectric layer comprises;

a first aperture that extends vertically completely through the first dielectric layer and through which the first conductive layer is coupled to the bond pad; and

a second aperture that extends vertically completely through the first dielectric layer and through which the first conductive layer is coupled to the first via end.

21. The method of claim 20, comprising:

forming a second dielectric layer that covers at least the first conductive layer and the first dielectric layer.

22. The method of claim 20, comprising forming a first conductive trace, wherein:

the first conductive trace runs in a plane that is parallel to the first die side and separated from the first die side; and

the first conductive trace runs alongside a first of the lateral die sides along at least most of the length of the first of the lateral die sides.